This lesson collects the questions that come up most often once an interview moves from "do you know the definitions" to "can you reason quickly about a circuit." Each answer is short on purpose – the depth is in the six lessons before this one, and each question below links back to the lesson it draws on, in case the reasoning behind the short answer is not immediately obvious.
Number systems and arithmetic
Why does hardware use two's complement instead of sign-magnitude for negative numbers?
Because two's complement lets addition and subtraction use the same adder circuit with no special-casing of the sign bit, while sign-magnitude needs separate logic to compare magnitudes before an operation can even begin. Two's complement also has exactly one representation of zero, where sign-magnitude and one's complement both have two (+0 and −0), which is extra logic a real design would otherwise have to account for.
How do you detect overflow in two's complement addition?
XOR the carry into the sign bit with the carry out of the sign bit; a result of 1 means overflow. Equivalently, overflow has occurred exactly when two operands with the same sign produce a result with the opposite sign – adding two positive numbers and getting a negative result, or adding two negative numbers and getting a positive result.
What is the range of an n-bit two's complement number?
−2n−1 to +2n−1−1. For 8 bits, that is −128 to +127 – one more negative value than positive, because the all-zero pattern is reserved for 0 and every other pattern splits evenly except the one with only the sign bit set.
Why is Gray code used in things like rotary encoders, instead of plain binary?
Because consecutive Gray code values differ in exactly one bit. In plain binary, a transition like 0111→1000 changes four bits at once, and if those four bits don't switch at exactly the same instant, the hardware can briefly read a completely wrong intermediate value. A one-bit-at-a-time code cannot produce that kind of large momentary error.
Gates and Boolean algebra
Why are NAND and NOR called universal gates?
Because either one alone, used repeatedly, can implement NOT, AND and OR – and therefore any Boolean function at all. Tying both inputs of a NAND together gives NOT; a NAND followed by a NOT gives AND; and De Morgan's law turns an AND-OR expression into an all-NAND or all-NOR equivalent.
What is the practical reason chips are built mostly from NAND and NOR rather than AND and OR?
In CMOS, a NAND or NOR gate is built directly from one stage of transistors, while an AND or OR gate needs that same NAND or NOR stage plus an extra inverter stage afterward. Fewer transistors means less area, less delay and less power, so a synthesis tool will prefer NAND/NOR gates from the library whenever the logic allows it.
State De Morgan's law and give one use for it.
(AB)′ = A′ + B′, and (A+B)′ = A′B′. The most common use is converting an expression written with ANDs and ORs into one written entirely with NANDs (or entirely with NORs), which matches what a NAND-only or NOR-only standard-cell library can actually build.
Karnaugh maps and minimization
Why is a K-map laid out in Gray code order along its edges, instead of plain binary order?
So that physically adjacent cells differ in exactly one variable, which is the condition required for two adjacent 1s to combine into a single simpler term. Plain binary order breaks this at the 01→10 boundary, where two bits change at once, so adjacent cells would no longer represent minterms that can legally be grouped.
What is a don't-care condition, and how do you use it on a K-map?
An input combination that either cannot occur or whose output value genuinely does not matter for the design. Mark it X on the map, then include it in a grouping only when doing so lets a group grow larger – an X should never be forced into a group it does not help, since that would only add a term without simplifying anything.
Why must K-map groups always be a power of two in size (1, 2, 4, 8…)?
Because each group represents the elimination of one or more variables by pairing cells that differ in those variables alone; a group that is not a power of two would have no single variable, or set of variables, whose two values it covers completely, so it could not correspond to any valid simplified term.
Adders, multiplexers and sequential logic
Why is a full adder built from two half adders instead of being designed from its own truth table?
Both approaches give a correct circuit, but reusing two existing half adders plus one OR gate is simpler to verify and reuse than re-deriving a three-input sum and carry expression from scratch, and it is the construction every textbook and most standard-cell libraries use, so recognizing it is usually what an interviewer is actually checking.
What is the main weakness of a ripple-carry adder, and how is it usually fixed?
Its worst-case delay grows with the number of bits, because each stage must wait for the carry from the stage before it. The standard fix is a carry-lookahead adder, which computes every stage's carry from the inputs directly instead of waiting for it to ripple – covered in detail in the next lesson of this path.
How can a multiplexer implement any Boolean function?
By wiring the function's own truth table onto the mux's data inputs: each data input is simply the output value for one row of the table, and the select lines are the function's input variables. A 2n-to-1 mux can therefore implement any function of n variables with no gates of its own beyond the mux.
Why is a flip-flop built from two latches instead of just one?
A single level-sensitive latch stays transparent for the whole time its enable is high, which is unsafe to cascade – a change at the input can race through multiple latches while the clock is still active. The master-slave structure's two latches, enabled on opposite clock phases, make the whole device edge-triggered: it only captures D at the instant of one specific clock edge, which is what makes cascading flip-flops safe.
What actually happens if you violate setup or hold time on a flip-flop?
Not necessarily a clean wrong value – the flip-flop's internal node can be left at neither a valid 0 nor a valid 1 for an unpredictable amount of time, a condition called metastability. This is why real designs budget timing margin to keep every data transition outside the setup/hold window, rather than treating a timing violation as "probably fine."
Key takeaways
- Most interview questions at this level are really asking "do you understand why," not just "do you remember the definition" – the reasoning is the answer.
- Two's complement, Gray code, NAND/NOR universality, and the K-map's Gray-code layout are all explained by one underlying property each, not by memorized rules.
- If a short answer here feels thin, the full reasoning is in the earlier lesson it references.