CHAPTER FOURTEEN

Timing Budgeting: A Slice of the Period Is Not Signoff

By the end of this chapter you will be able to point at a clock waveform and name the launch edge, the capture edge, the period, the teaching taxes, and the remaining window. You will split that window among the rooms, lighten rooms into timing abstracts, run a virtual rehearsal called estimate_timing, read the artificial corner named estimated_corner, write files you can source, and treat a returned 1 as a heartbeat, not as a closed path.

Why this chapter matters in a real project

Think of a chip as a city of rooms. Power is already in the streets from Chapter 10. The data bus already has a map from Chapter 11. The clock already has a coarse spine from Chapter 12. The doors already sit on the walls from Chapter 13. What the city still lacks is an agreed split of one clock tick. Draw that tick as a waveform. A rising edge launches a flip-flop in CPU_CLUSTER. The next rising edge, 625 ps later, must capture the data in NPU_CORE. That is 1.60 GHz. It is not infinite. Uncertainty and setup eat the two ends of the wave. The green window that remains is what leftover glue, the CPU room, and the NPU room must share.

Sit with Nimbus-8 the morning after Chapter 13. The leftover channel is still 2.091 mm² = 2,091,000 µm². The 128-bit bus still has a map through that leftover. Clock pins still sit where you put them. The doors you placed stay. Today you do not move furniture. Today you split the remaining tick.

If you skip this chapter, two expensive things happen. Either every room is told it may use the whole 625 ps, and the leftover glue has nothing left, or you copy a nearby latency of 5 ns onto a 625 ps clock and invent eight ticks of fiction. Multiply instantiated block, then MIB: two copies of the same drawing. On Nimbus-8 those copies are u_npu_core_0 and u_npu_core_1, sharing NPU_CORE. The first instance you add for budgeting is the master. Its clocks win for the shared drawing.

One more thing, because it will happen to you. You will type estimate_timing. It will return 1. You will type compute_budget_constraints. It will return 1. That means the command finished. It does not mean the remaining 550 ps was split fairly. It does not mean estimated_corner is a library corner you tape out. It does not mean a budget file exists on disk. Those are other commands.

Prerequisites

Chapter 13, because pins are already placed and budgeting is done on rooms whose doors already sit. Chapter 12, because clock pins stay fixed and the spine is a prior, not a second CTS. Chapter 11, because leftover glue already has a bus map. Chapter 10, because M4 and M5 still carry the 20 µm power mesh. Chapter 9, because blocks are shaped. Chapter 8, because a module is a name and a block is a physical room — budgets sit on rooms, not on names. Chapter 5, because plan.budget.bbt_fixed_delay was named there and is cooked here, not re-taught from scratch. Chapter 3, because split constraints already made separate top-level and block-level SDC and UPF files. Budgeting needs those separate files. Mapping keyword this chapter is BUDGET.

The library is nimbus8.dlib. The top is NIMBUS8. Teaching pin, port, clock, and net names in this book are stand-ins. Query them with get_pins, get_ports, get_clocks, and get_nets. Brace Tcl indexes.

How to read the numbers and the notation in this chapter

Read this table slowly. Every later command uses these words. If a word here is still fog, stop and read the row again before you type Tcl.

Learning objectives

After this chapter you will be able to:

1. Point at launch, capture, period, uncertainty, setup, and the remaining 550 ps window on a clk_cpu waveform, and refuse a nearby 5 ns latency example.
2. Merge pin changes if needed, then create timing abstracts with create_abstract -estimate_timing.
3. Run estimate_timing, read return 1 as a heartbeat, and taste report_timing -corners estimated_corner.
4. Name the obsolete compute_budget_constraints -estimate_timing switch and use plan.budget.estimate_timing_mode instead.
5. Set a manual pin slice with set_pin_budget_constraints, then compute and report.
6. Write budgets with write_budgets, source them after split constraints, and put BUDGET in the mapfile.
7. Say what a budget shell is for, and say out loud that it is not tapeout.
8. Pick up plan.budget.bbt_fixed_delay from Chapter 5 without re-teaching black boxes.
9. Leave implementation for later. This chapter ends with promises you can source, not with place_opt.

The beginner’s mental model

A waveform is not a measured path

Hold a square wave. A rising edge launches. The next rising edge captures. The time between them is the period. You agree those two edges before anyone routes a metal. A budget is a coloured band between those edges: this much for the CPU room, this much for leftover glue, this much for the NPU room. Later, in signoff, you overlay the real data edge on the same clock. That overlay is the weighing scale. This chapter only paints the bands.

People sometimes call the remaining window a pie. That nickname is fine after you can point at the wave. It is not a replacement for the wave. A nearby example writes a clock latency of 5. That is 5 ns = 5,000 ps if the unit is nanoseconds. On this waveform the whole period is 625 ps. Five nanoseconds is eight ticks of fiction. You do not copy it. You query get_clocks. You label every teaching band an estimate.

The precise engineering model

The database already has shaped blocks, a leftover channel, a compiled power grid, a bus map, a clock spine, and placed pins. Timing budgeting adds promised delays on the boundary of those rooms. You typically lighten the rooms into timing abstracts. You run virtual in-place optimisation. You may write a manual slice on a pin you refuse to leave to the tool. You compute. You report. You write files. You source those files after the split-constraint files from Chapter 3, not instead of them.

The nearby flow picture still writes compute_budget_constraints -estimate_timing. The command page says that switch, and -no_estimate_timing, are obsolete and will be removed. New Tcl in this book runs estimate_timing yourself, sets plan.budget.estimate_timing_mode, then computes without the dead flag. Confirm with man.

The practical loop is kind to beginners. Abstracts. Estimate. Taste the artificial corner. Name the rooms. Optional manual slice. Compute. Taste the budget. Write. Source after split. Four small walks are easier to debug than one giant one.

Concepts built from first principles

Part 1 — Read the waveform first

Do not start with a command. Start with the picture the command is trying to split. If you cannot point at a launch edge, a capture edge, a tax, and a remaining window on a sketch, the Tcl will only hide the fog.

Launch, capture, period

A waveform is high and low over time. For teaching we draw clk_cpu as a square wave. The launch edge is the rising tick that starts the walk. The capture edge is the next rising tick that must catch the data. The period is the time between those two edges. For clk_cpu that is 1 / 1.60 GHz = 0.625 ns = 625 ps.

Query with get_clocks. Query the real create_clock waveform. This book’s square wave is a teaching drawing with half the tick high. Do not invent the duty on a netlist that already named it.

Taxes sit on the ends of the tick

The capture flop needs the data to sit still for a while before its clock edge. That wait is setup. This book uses 30 ps. The two clocks might not be exactly where the drawing says. That fuzz is uncertainty. This book uses 45 ps after launch. They are estimates. They are not signoff derates.

Paint those two taxes on the wave. What is left in the middle is the remaining window: 625 − 45 − 30 = 550 ps = 0.550 ns. Required time, in this picture, is capture minus setup minus uncertainty. A budget is a promised slice of that remaining window. People call it a pie after they can point at the green band. The pie is not a second physics.

The walk sits on the same wave

Launch flip-flop inside CPU, leftover glue in the channel, capture flip-flop inside NPU. Put those three slices on the remaining window: 150 ps inside CPU_CLUSTER, 190 ps leftover, 210 ps inside NPU_CORE. 150 + 190 + 210 = 550. Say both units: 0.190 ns = 190 ps.

The budget files you write later constrain boundary paths: input delay, output delay, and a virtual clock that copies this waveform. They do not rewrite every gate inside the room as a full SDC of the sofa.

Do not confuse these

Part 2 — estimated_corner is an artificial corner

estimate_timing creates a new corner named estimated_corner. It is artificial. Draw two gold data edges on the same clock wave. Corner A arrives at 420 ps. Corner B arrives at 520 ps. The artificial corner keeps the later edge on this path, and it keeps the later edge of the other path from the other corner. If corner A is slow on path 1 and corner B is slow on path 2, the mode paired with estimated_corner keeps both.

Taste with report_timing -modes [all_modes] -corners estimated_corner. The paths carry extra letters. A lowercase e means the value came from estimate_timing. A or a means the value came from create_abstract -estimate_timing. S means SPEF or SDF. An asterisk * means you overrode the value with set_annotated_delay. The Analysis column may say Size: None, Buff: Short net, or that three buffers were added in the rehearsal. Those buffers are virtual. They are not a netlist edit you would tape out. They may move the gold edge on this drawing. They do not change the saved netlist.

Budgets are then generated for all corners, modes, and scenarios, including the estimated ones. Do not ship estimated_corner as if it were SS 0.72 V. It is a planning tape measure.

Part 3 — Timing abstracts are light rooms

A timing abstract is a smaller, more efficient copy of a room, useful for generating budgets. Pins are already placed. You do not re-place the sofa before you lighten the inside. If you placed those pins on an abstract, you must first merge_abstract so the doors copy into the full design view. Then source the block’s split top.tcl once, to apply internal constraints. Then, in the nearby cook, add_feedthrough_buffers (plural). Then create_abstract -estimate_timing.

That last command runs virtual timing optimisation on the interface logic and annotates the abstract with the result. You may omit -estimate_timing if you already ran the virtual step earlier. On multiple levels of physical hierarchy, only the lowest rooms become abstracts. Intermediate parents stay design views.

Black boxes get their own abstracts after load_block_constraints -type SDC. Do not pretend a black box was virtually optimised. Query report_abstracts for leaf-cell count, compression, and which modes and corners the abstract actually holds. Before abstracts that carry estimated_corner, set abstract.enable_improvements_for_budgeting true. Read it back with report_app_options.

# Teaching stand-ins. Query instances first
icc2_shell> open_block nimbus8.dlib:CPU_CLUSTER.design
icc2_shell> merge_abstract
icc2_shell> source split/CPU_CLUSTER/top.tcl
icc2_shell> add_feedthrough_buffers
icc2_shell> create_abstract -estimate_timing
icc2_shell> save_lib
icc2_shell> report_abstracts

The nearby cook passes reference names to create_abstract -blocks — the drawing, not a copy. set_budget_options -add_blocks and write_budgets -blocks take instance paths. A nearby incremental example writes U1. Confirm with man. New Tcl uses {CPU_CLUSTER NPU_CORE ISP} on the abstract, and u_cpu_cluster / u_npu_core_0 on the budget commands.

Part 4 — Virtual in-place optimisation is a rehearsal

estimate_timing pretends to remove repeaters, build repeater trees, and size cells. The simulated effects are stored as annotations on estimated_corner. The saved netlist stays the saved netlist — unless a child view was illegal and the tool opened it to buffer feedthroughs, as the previous trap said.

It optimises top-level logic whether or not a block is editable. Editable rooms and boundary nets that cross editable or read-only rooms are in scope. Cells or nets completely inside a non-editable block are avoided. If you defined unified topology constraints on a net, those constraints steer the delay; query estimated_analysis on a pin to see whether they were used. If they were not defined, the tool uses ordinary buffering to estimate.

Open the top. Set the constraint mapping file from Chapter 3. Source the top-level split top.tcl (or the full-chip SDC in a full-netlist flow). Then run estimate_timing. Return 1 is a heartbeat. Taste is the timing report on estimated_corner.

# Top-level rehearsal. Mapping file is the Chapter 3 prior
icc2_shell> open_block nimbus8.dlib:NIMBUS8
icc2_shell> set_constraint_mapping_file split/mapfile
icc2_shell> source split/NIMBUS8/top.tcl
icc2_shell> set_app_options -name abstract.enable_improvements_for_budgeting \
    -value true
icc2_shell> estimate_timing
icc2_shell> report_timing -modes [all_modes] -corners estimated_corner

Acceptable child views: a design view, or a timing abstract that already carries child-level estimate_timing data. If a child is the wrong view, the tool may open it, run the singular feedthrough-buffer step, build a timing abstract, retarget the instance, and continue. That reference-view change happens unless set_editability -value false is set on the child. App options under plan.estimate_timing.abstract* steer that inner buffering. Read them with report_app_options plan.estimate_timing.abstract*. Do not invent defaults.

Part 5 — Constraining the estimate: layers, clips, and partial routes

You can still steer the rehearsal. set_net_estimation_rule names which layers the estimate may use for RC. Then you attach the rule to nets with set_attribute ... estimate_timing_net_rule. A nearby example uses M7 horizontal and M8 vertical. On Nimbus-8 the teaching bus from Chapter 11 is M3 horizontal and M6 vertical. Query get_layers. Do not copy M7/M8 onto a library that never had them.

# Teaching layers. Query get_layers before you copy
icc2_shell> set_net_estimation_rule -parameter layer \
    -horizontal_value M3 -vertical_value M6 rule_bus
icc2_shell> set_attribute -objects [get_nets -of_objects \
    [get_bundles cpu_npu_data]] \
    -name estimate_timing_net_rule -value rule_bus

Layer promotion on critical nets is plan.estimate_timing.optimize_layers true. That also allows promotion inside create_abstract -estimate_timing. When it is on, the global router runs in floorplan mode during the estimate. Mesh layers M4 and M5 still belong to Chapter 10. You do not promote the teaching bus onto the mesh because the metal looks fat.

Maximum net delay and maximum cell delay are plan.estimate_timing.maximum_net_delay and plan.estimate_timing.maximum_cell_delay. A nearby example sets both to 1.0. If the unit is nanoseconds, that is 1,000 ps on a 625 ps clock — larger than the whole tick. Do not copy 1.0 onto clk_cpu. If you clip at all, pick a slice you can defend, for example 0.150 ns = 150 ps, and label it an estimate. After the run, pins whose delay was replaced have is_et_delay_clipped==true.

icc2_shell> get_pins -of_objects [get_cells *] \
    -filter is_et_delay_clipped==true

Partial routes are ignored by default. Set plan.estimate_timing.honor_routes true if you want existing global or detail segments kept and only the missing bits estimated. Read the option back. Do not assert a default from memory.

Part 6 — Incremental estimate_timing needs a full run first

By default each full run throws away previous annotations and recalculates. To update only a walk, pass -pins or -nets. Other annotations from the last full run stay. If you skip the full run, incremental has nothing to keep.

If you moved cells on the critical path, recreate abstracts for the rooms you touched: create_abstract -estimate_timing -force_recreate -blocks .... Then incremental-estimate the pin or net on that walk. A nearby log says the full chip virtually optimised 903 of 13,637 cells; the incremental walk virtually optimised 36 of 2,093. That difference is the point of incremental, not a QoR number you would ship.

icc2_shell> estimate_timing
icc2_shell> report_timing -corners estimated_corner
# After you moved cells on that walk, rebuild that room’s abstract
icc2_shell> create_abstract -estimate_timing -force_recreate \
    -blocks {CPU_CLUSTER}
icc2_shell> estimate_timing -pins [get_pins \
    {u_cpu_cluster/cpu_npu_data_reg_0_/Q}]

Teaching pin names are stand-ins. Query get_pins. Brace Tcl indexes.

Part 7 — Manual budget constraints are promises you said out loud

Automatic compute still creates pin and boundary constraints for every hierarchical pin. Manual is how you override a slice you refuse to leave to the tool. You can combine them: write the manual slice, then compute.

Pin constraints: set_pin_budget_constraints. How much of a path through a door stays inside. The textbook is -internal_percent 40 on a pin such as u0_0/rstn — 40 percent inside the room, 60 percent outside. On Nimbus-8 you would query the actual pin. Percent and delay forms are mutually exclusive on the same call. -internal_percent is equivalent to -input -internal -to_percent.

# Teaching stand-in. Query get_pins first
icc2_shell> set_pin_budget_constraints \
    [get_pins {u_cpu_cluster/cpu_npu_data[0]}] \
    -internal_percent 40

Boundary constraints: set_boundary_budget_constraints. Driving cell and load. Then attach with -late_boundary / -early_boundary on the pin command. Latency constraints: set_latency_budget_constraints. Early and late clock latency. A nearby example uses -early_latency 5 -late_latency 5 on a clock named clk. If the unit is nanoseconds, that is 5,000 ps. Teaching latency, if you set one at all, is a small slice of 625 ps — for example 0.080 ns = 80 ps — labelled an estimate. Query get_clocks.

Part 8 — Naming rooms and computing the split

set_budget_options -add_blocks names the instances that will receive a budget. When a multiply instantiated block appears in the list, the instance given first is the master. Its clocks and their characteristics are used for the generated budget. On Nimbus-8, if both NPU copies are in the list, put the master you intend first. -reset clears budget constraints and options from set_budget_options, the pin / latency / boundary commands, and compute_budget_constraints.

Then compute_budget_constraints splits the remaining window on the wave. If you specify none of -setup_delay, -boundary, or -latency_targets, the tool behaves as -setup_delay -boundary. -latency_targets must be paired with -balance. Values are actual (match current latencies) or estimated (match predicted trunk latency — clock trunk planning from Chapter 12 must already have been run).

icc2_shell> set_app_options -name plan.budget.estimate_timing_mode -value true
icc2_shell> set_budget_options -add_blocks [get_cells \
    {u_cpu_cluster u_npu_core_0 u_npu_core_1}]
icc2_shell> compute_budget_constraints -setup_delay -boundary

Read plan.budget.estimate_timing_mode back. Do not invent a default. u_npu_core_0 listed first is the MIB master. plan.budget.bbt_fixed_delay is the Chapter 5 thread: when a black-box delay was measured, leave the option so the budgeter maintains it; when the delay was a guess, set it false so the budgeter may adjust, and take the tightened number to the block owner. Do not re-open Chapter 5’s black-box cook. Just decide, here, which way the option faces on the rooms that are still boxes.

Part 9 — report_budget is the taste

compute_budget_constraints finished. Taste is report_budget. If you computed in estimate-timing mode, the report may open with ABS-240: the budget is based on estimated_corner delays. That is information, not a pass. Read it as “this window was cut with the tape measure, not with the weighing scale.”

icc2_shell> report_budget -blocks
icc2_shell> report_budget -html_dir budget_html
icc2_shell> report_budget -warning_pins -verbose > warning_pins.txt
icc2_shell> report_budget -through [get_pins \
    {u_cpu_cluster/cpu_npu_data[0]}]

Warning-pin reasons you will actually see: clock_pin (the pin is on a clock network), false_path (every path through it is a false path), unclocked_endpoint, unconstrained_input_port. A bidirectional pin is expected to have at least one input delay and one output delay; a missing direction with no path in that direction shows up here. That is a constraint gap, not a router bug.

Part 10 — write_budgets writes files you can source

A computed budget is not a written budget. write_budgets writes a directory (default ./budgets) with one folder per reference, a top.tcl that sources mode and corner files, and a mapfile whose keyword is BUDGET. Those files put this same clock waveform onto a virtual clock — a clock with the waveform and no source in the netlist — then hang set_input_delay and set_output_delay off its edges. Budgets apply to boundary paths, not to internal combinational segments. Whenever you write a new budget, you must source that block’s top.tcl again. A new file overwrites the old boundary constraints.

Source order is not a style. Source split constraints first, then the budget. Budget is not a replacement for Chapter 3.

icc2_shell> write_budgets -blocks [get_cells \
    {u_cpu_cluster u_npu_core_0 u_npu_core_1}] \
    -force -output budgets

# Later, inside a block. Split first, then budget
icc2_shell> set_constraint_mapping_file split/mapfile
icc2_shell> source split/CPU_CLUSTER/top.tcl
icc2_shell> set_constraint_mapping_file budgets/mapfile
icc2_shell> source budgets/CPU_CLUSTER/top.tcl

set_constraint_mapping_file without -reset appends. That rule is still true from Chapter 12. If you meant to replace the map, say -reset. Optional: update_constraint_mapping_file -remove_blocks before you source. App options that change what is written: plan.budget.all_design_subblocks, all_full_budgets, allow_top_only_exceptions, hold_buffer_margin, pessimistic_driving_cells, write_hold_budgets. Read them back. Do not invent defaults.

Part 11 — A budget shell is a stand-in, not tapeout

A budget shell is a macro-like representation of the I/O timing and physical interface of a room. The parent can explore while the child is still a promise. Paths that used to walk into the child become budgeted paths to the shell ports. write_budgets -shell_subblocks takes reference names and forces a full budget on the parent. Incremental budgets are not allowed on that parent.

For final chip production to generate a tapeout database, do not use the budget-shell flow. Use implemented blocks, starting from RTL. That sentence is the nearby note, said out loud so a shell cannot hide as a finished chip.

By default the shell keeps PG pins and multivoltage Liberty attributes (voltage map, related power and ground, isolation, level-shifter ranges, and friends). Set mv.hierarchical.include_pg_in_budget_shell false only if you mean to drop them. Read it back. After the shell: reset, reload UPF for top and shells separately, commit_upf, then source the shell timing files. The nearby cook also names a shell environment variable, SYNOPSYS_LC_ROOT, as a prior for Liberty Compiler when writing shells. Name it. Do not invent a path.

# References, not a feeling. Query get_cells / ref_name first
icc2_shell> set_budget_options -add_blocks [get_cells \
    {u_cpu_cluster u_npu_core_0}]
icc2_shell> compute_budget_constraints -setup_delay -boundary \
    -latency_targets actual -balance true
# Optional: freeze a percent slice after compute
icc2_shell> set_pin_budget_constraints -internal_percent 40 -all
icc2_shell> write_budgets -shell_subblocks {CPU_CLUSTER NPU_CORE} \
    -output budget_shell

A nearby script writes get_cells "B_cell" "C_cell" as two arguments. Teaching Tcl passes one list: [get_cells {u_cpu_cluster u_npu_core_0}]. Confirm with man.

Part 12 — Mapping, MIB, and the black-box delay

Three mapping keywords now live in this book. Chapter 3: SDC and UPF. Chapter 12: CTS_CONSTRAINT. This chapter: BUDGET. set_constraint_mapping_file without -reset appends. Read the mapfile. Do not hope.

MIB: two copies, one drawing. The first instance in -add_blocks is the master. Its clocks win. Pin slices you want shared use -same_as_mib on set_pin_budget_constraints. Copies are still u_npu_core_0 and u_npu_core_1, sharing NPU_CORE.

Black-box delay: plan.budget.bbt_fixed_delay was named in Chapter 5. This is the cook it sits in. If the black-box number was measured, keep the tool from “improving” it. If it was a guess, set the option false and take the tightened figure to the owner. Read it back. Do not re-teach black boxes here.

To run the same abstract script on several rooms, run_block_script still exists from earlier chapters. Parallel work is a host-options object, not a feeling.

Inputs, outputs, and readiness

Preflight: split files exist; pins placed and merged if needed; clock pins still fixed; rooms named; clk_cpu period said out loud as 625 ps; remaining window said out loud as 550 ps on the wave; MIB master said out loud; plan.budget.bbt_fixed_delay decided for any remaining box.

Guided tool workflow

Validation gates: report_abstracts shows timing abstracts with compression you can point at; estimated_corner exists and was read; ABS-240 is expected or explained; warning pins are owned; mapfile contains BUDGET; leftover still 2.091 mm²; teaching split still labelled an estimate.

One continuous worked example

Nimbus-8. Library nimbus8.dlib. Top NIMBUS8. Leftover 2.091 mm² = 2,091,000 µm². clk_cpu 1.60 GHz = 625 ps. Remaining window 550 ps on the wave. Teaching split 190 leftover / 150 CPU / 210 NPU. Pins already placed. Clock pins already fixed.

# Teaching stand-ins. Query before you copy
icc2_shell> open_block nimbus8.dlib:NIMBUS8
icc2_shell> set_constraint_mapping_file split/mapfile
icc2_shell> source split/NIMBUS8/top.tcl

icc2_shell> set_app_options -name abstract.enable_improvements_for_budgeting \
    -value true
icc2_shell> report_app_options abstract.enable_improvements_for_budgeting
icc2_shell> create_abstract -estimate_timing -blocks \
    {CPU_CLUSTER NPU_CORE ISP}
icc2_shell> report_abstracts

icc2_shell> estimate_timing
icc2_shell> report_timing -modes [all_modes] -corners estimated_corner

icc2_shell> set_app_options -name plan.budget.estimate_timing_mode -value true
icc2_shell> report_app_options plan.budget.estimate_timing_mode
icc2_shell> set_budget_options -add_blocks [get_cells \
    {u_cpu_cluster u_npu_core_0 u_npu_core_1}]
icc2_shell> set_pin_budget_constraints \
    [get_pins {u_cpu_cluster/cpu_npu_data[0]}] \
    -internal_percent 40
icc2_shell> compute_budget_constraints -setup_delay -boundary
icc2_shell> report_budget -warning_pins -verbose > warning_pins.txt
icc2_shell> write_budgets -blocks [get_cells \
    {u_cpu_cluster u_npu_core_0 u_npu_core_1}] \
    -force -output budgets

Read return 1 as a heartbeat. Read ABS-240 as “cut with the tape measure.” If the NPU copies disagree about clocks, you listed the wrong instance first, or you budgeted only one copy and hoped the drawing would invent the other promise.

Later, inside CPU_CLUSTER: source split/CPU_CLUSTER/top.tcl, then budgets/CPU_CLUSTER/top.tcl. Mapping keyword BUDGET. Without -reset, a second set_constraint_mapping_file appends.

Failure modes and debugging

Hands-on mini lab — Aldebaran-4

Aldebaran-4 has a core that is a square 900 µm = 0.900 mm on each side, so an area of 0.810 mm² = 810,000 µm². Two blocks, one leftover strip between them. One clock at 1.00 GHz = 1,000 ps. Teaching taxes 50 ps uncertainty and 30 ps setup, so the remaining window is 920 ps. No MIB. Pins already placed. Split files already exist.

1. Query clocks, pins, and layers. Do not invent names from this page.
2. Create timing abstracts with create_abstract -estimate_timing. Read report_abstracts.
3. Run estimate_timing. Read return 1 as a heartbeat. Taste report_timing -corners estimated_corner.
4. Set plan.budget.estimate_timing_mode and read it back. Do not type the obsolete compute flag.
5. Add both block instances with set_budget_options -add_blocks. Put a 40 percent internal slice on one queried data pin.
6. Compute with -setup_delay -boundary. Taste report_budget -warning_pins -verbose. Write with -force.

You are done when the remaining 920 ps is a window you can point at on a square wave, estimated_corner was read, warning pins are owned or empty, and budgets/<ref>/top.tcl exists to source after split. Label every number an estimate. Do not copy a 5 ns latency onto a 1,000 ps clock.

Interview preparation

Chapter close

Sign-off checklist for this planning stage

1. You can point at launch, capture, period, uncertainty, setup, and the remaining 550 ps window on a clk_cpu waveform.
2. Clocks, pins, nets, and layers were queried, not invented.
3. clk_cpu was said as 1.60 GHz = 625 ps. Remaining window was said as 550 ps on the waveform. Teaching split 190 leftover / 150 CPU / 210 NPU was labelled an estimate.
4. Pins from Chapter 13 were already placed. Clock pins from Chapter 12 stayed fixed.
5. Abstracts used create_abstract -estimate_timing. MPH kept intermediate parents as design views.
6. estimate_timing return 1 was followed by report_timing -corners estimated_corner.
7. The obsolete compute flag was refused. plan.budget.estimate_timing_mode was read back.
8. report_budget -warning_pins was read. ABS-240 was treated as information.
9. write_budgets wrote files. They were sourced after split. Mapfile keyword is BUDGET.
10. A budget shell, if used, was not called tapeout. plan.budget.bbt_fixed_delay was decided for any remaining box.
11. Implementation was not mixed into this script.

Key-concept flashcards

Compact glossary

Five-question self-check

Antares-2 has a core that is a square 1,100 µm = 1.100 mm on each side, so an area of 1.21 mm² = 1,210,000 µm². Two copies of one reference. One clock at 800 MHz = 1,250 ps. Teaching taxes 45 ps + 30 ps, so the remaining window is 1,175 ps. Pins already placed. Split files already exist.

1. A colleague draws a 625 ps clk_cpu wave and paints the whole tick green for the NPU room. What two taxes did they skip, and what remaining window should they have painted?
2. You run estimate_timing -pins as the first command of the day. Why is that incomplete, and what do you run first?
3. You type compute_budget_constraints -inputs and the tool rejects it. Why, and which other command uses the plural?
4. After write, Antares-2’s two copies disagree about clock latency in the budget files. Which set_budget_options rule did you skip?
5. A colleague asks to tape out the budget shell you just wrote for Antares-2. What do you say, and which nearby prohibition do you quote?

Answers.

1. They skipped 45 ps of uncertainty after launch and 30 ps of setup before capture. The remaining window on Nimbus-8’s clk_cpu is 550 ps, not 625 ps. (Antares-2’s own remaining window would be 1,175 ps.)

2. Incremental -pins needs a previous full run so other annotations have somewhere to stay. Run full estimate_timing first, taste estimated_corner, then incremental.

3. Compute’s command page uses singular -input / -output. A nearby table uses the plural. The plural lives on set_pin_budget_constraints -inputs. Do not mix the families. Confirm with man.

4. The first instance in set_budget_options -add_blocks is the MIB master. Its clocks are used for the generated budget. Name both copies and put the intended master first.

5. No. A budget shell is a stand-in for exploration. Final chip production uses implemented blocks starting from RTL. That is the nearby prohibition, said out loud.

Why implementation follows, and this chapter stops

The leftover channel now has a bus map, a clock spine, a set of doors you checked, and a set of promised slices you can source. The mesh still holds power. The remaining 550 ps on clk_cpu is split on paper as 190 leftover / 150 CPU / 210 NPU, labelled an estimate. What the chip still lacks is the implementation that turns those promises into placed cells, a real clock tree, and a path you would weigh. That work is not a tail on write_budgets. This chapter ends with budgets. The next session, after you have reviewed this one, begins at implementation — not at a fifteenth planning verb invented in the same cook.