Digital Electronics · lesson 10

Fixed-Point and Floating-Point Representation

Representing fractions in binary: fixed-point Q formats, IEEE 754 single-precision floating point, a fully worked encoding example, and the standard's special values.

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Why integers are not enough

Every representation covered so far in this path โ€“ two's complement, BCD, Gray code โ€“ stores a whole number. Real designs regularly need to store a fraction too: a sensor reading, a filter coefficient, an audio sample. There are two standard ways to extend binary representation to cover this, and the choice between them is a genuine design trade-off, not just a notational preference.

Fixed-point representation

A fixed-point number simply fixes, in advance, where the binary point sits within a word of bits โ€“ some bits represent the integer part, the rest represent the fraction, and that split never changes for the lifetime of the value. The usual notation is Qm.f, meaning m integer bits and f fractional bits. In Q4.4 format, for example, the 8-bit pattern 0010.1100 represents 2 + 0.5 + 0.25 = 2.75, because the four bits after the point stand for 2−1, 2−2, 2−3 and 2−4 respectively, the same way the bits before the point stand for 23 down to 20. Arithmetic on fixed-point numbers uses the ordinary integer adders and multipliers already covered in this path โ€“ the hardware never has to know where the point is, since it is purely a bookkeeping convention the designer tracks on paper. The limitation is range: a Q4.4 format can represent values only from −8 to just under +8, in steps of exactly 1/16, so widening the fraction to gain precision directly narrows the range, and vice versa.

Floating-point representation

Floating point solves the range-versus-precision trade-off by letting the position of the binary point move, and storing where it currently is as part of the number itself โ€“ the same idea as decimal scientific notation, where 1.325 × 104 and 1.325 × 10−4 use the same digits but very different exponents. The IEEE 754 standard is the format almost every real design and processor uses, and its single-precision form packs a number into 32 bits split into three fields: 1 sign bit, 8 exponent bits, and 23 mantissa (fraction) bits.

S 1 bit Exponent 8 bits, bias 127 Mantissa (fraction) 23 bits
IEEE 754 single precision: sign, then an 8-bit biased exponent, then a 23-bit fraction. The value is (−1)S × 1.mantissa × 2exponent−127.

Two details make this field layout work correctly. First, the mantissa stores only the fractional bits after an implied leading 1 โ€“ every normalized binary number can be written as 1.xxxx × 2something, so that leading 1 carries no information and storing it would waste a bit. Second, the exponent is stored with a bias of 127 added to it, so a stored exponent field of 10000010 (130) means an actual exponent of 130−127 = 3, not 130; the bias lets the stored exponent be an unsigned 8-bit number while still representing both positive and negative actual exponents.

Worked example: encoding −13.25

Let us encode −13.25 in IEEE 754 single precision. First, the sign: the number is negative, so S = 1. Next, write the magnitude in binary: 13 is 1101, and 0.25 is 0.01 (since 0.25 = 2−2), so 13.25 is 1101.01 in binary. Normalize this to the form 1.xxxx × 2e by sliding the point until exactly one 1 is left before it: 1101.01 = 1.10101 × 23, since the point moved three places to the left. The actual exponent is therefore 3, so the stored, biased exponent is 3 + 127 = 130, which in 8-bit binary is 10000010. The mantissa field stores the bits after the implied leading 1 โ€“ here, 10101 โ€“ padded with zeros out to 23 bits: 10101000000000000000000.

Putting the three fields together: 1 10000010 10101000000000000000000. Thus, −13.25 is stored as a sign bit of 1, a biased exponent of 130, and a mantissa whose implied value is 1.101012 = 1.65625, giving −1.65625 × 23 = −13.25 when decoded, which checks against the number we started with.

Special values

IEEE 754 reserves the two extreme exponent field values (all zeros and all ones) to represent cases a normalized number cannot express cleanly, rather than letting the format silently misrepresent them.

IEEE 754 single-precision special values
Exponent fieldMantissa fieldRepresents
00000000all zerosSigned zero (+0 or −0, depending on S)
00000000nonzeroDenormalized number (no implied leading 1; extends range toward zero at reduced precision)
11111111all zerosSigned infinity (+∞ or −∞)
11111111nonzeroNaN (Not a Number โ€“ the result of an undefined operation such as 0/0)

A denormalized number drops the implied leading 1 and uses the smallest possible exponent, which lets the format represent values smaller in magnitude than any normalized number can reach โ€“ at the cost of fewer significant bits the closer the value gets to zero. This is why the standard is usually described as degrading precision gracefully near zero rather than jumping straight from the smallest normal number to zero with nothing in between.

Key takeaways

  • Fixed-point (Qm.f) fixes the binary point's position in advance and reuses ordinary integer hardware; it trades range against precision for a fixed word width.
  • Floating point lets the point's position float by storing an exponent alongside the value, trading some precision for a much wider representable range.
  • IEEE 754 single precision packs sign (1 bit), biased exponent (8 bits, bias 127) and mantissa (23 bits, with an implied leading 1) into 32 bits.
  • −13.25 encodes as sign 1, exponent 10000010 (130, actual exponent 3), mantissa 10101000000000000000000.
  • The all-zero and all-one exponent fields are reserved for zero, denormalized numbers, infinity and NaN, rather than being ordinary normalized values.