Cadence Tempus · Static Timing Analysis & Signoff

Tempus Mentor Guide

A 15-chapter Cadence Tempus static timing analysis mentor guide, from licenses and design import through delay calculation, SI, CPPR, AOCV and SOCV, MMMC, path-based analysis, IR drop and aging to signoff ECO and timing models. Free to read online; the Offline Edition PDF is 199 rupees.

15 chapters · Free, no login

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Tempus Mentor Guide book cover
  1. 01Getting Started with Tempus: Licenses, Launch and Help
  2. 02Design Import: Building a Clean Timing Database
  3. 03Base Delay Calculation: How Tempus Turns Libraries and Wires into Delays
  4. 04Signal Integrity Delay Analysis: How Crosstalk Changes Delay
  5. 05Glitch, Overshoot and Undershoot: Noise on Quiet Nets
  6. 06Analysis Modes, CPPR and AOCV: Choosing Early and Late Delays
  7. 07SOCV and Wire Variation: Timing with Mean and Sigma
  8. 08Multi-Mode Multi-Corner Analysis: Timing Every Mode at Every Corner
  9. 09Hierarchical Timing Context: Signing Off a Block with the Top-Level View
  10. 10Path-Based and Robustness Analysis: Removing Pessimism and Measuring Risk
  11. 11Power Domains, IR Drop and Aging: Timing at the Real Voltage
  12. 12Advanced Checks and Timing Debug: Closing the Gap Between Reports and Silicon
  13. 13Distributed STA: Timing One Large View on Many Machines
  14. 14Signoff ECO: Fixing the Last Violations Without Breaking Signoff
  15. 15Timing Models: Standing In for a Block at the Top Level

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