What this chapter covers

Signoff is whether the design works across manufacturing variation, on-chip variation, aging, and operating conditions — not whether one nominal report is green. This chapter covers OCV derates through AOCV to POCV/LVF, intelligent corner matrices, removing artificial pessimism (including CRPR) without deleting real margin, and correlating analysis to silicon.

Every tapeout STA signoff is a robustness argument: coverage of the mode×corner grid, justified margins, and evidence that pruned corners and recovered pessimism were safe. Interviewers use this to find engineers who can own signoff quality.

Worked example

Flat OCV might derate every cell 8% late. AOCV reduces that derate on a deep path because random variation averages. CRPR then returns common-path clock pessimism that was double-counted. If you also enable POCV without constraint-sigma, you can still compare a statistical arrival against a deterministic setup/hold number — silent optimism.

A common misconception

Calling silicon “always better than STA” and cutting margins, or applying a single derate everywhere. Another trap is declaring timing clean from GBA WNS after PBA was only sampled on a few paths.

Sample interview answers

How is OCV different from a PVT corner? A PVT corner is a global operating point (process, voltage, temperature). OCV models on-die variation around that corner, typically with derates or statistical delay.

What does CRPR/CPPR credit? Common clock-path delay that was pessimistically taken late on one side and early on the other. The credit is only for the shared portion.

What makes a “timing is clean” claim defensible? Constrained coverage, justified exceptions, variation model, SI where required, and the full analysis-view matrix — not a single zero-WNS screenshot.

The paid PDF develops OCV/AOCV/POCV examples, CRPR interactions with SI, signoff checklists, and the expert interview set for this chapter.

Previous: Interface analysis · Handbook: STA library · Related: OCV vs PVT, AOCV, Expert STA questions

💡 Key Technical Topics Covered

  • OCV, AOCV, and Parametric OCV (POCV/LVF)
  • Clock Gating Setup & Hold Verification
  • Asynchronous Reset Recovery & Removal Checks
  • Multi-Corner Multi-Mode (MCMM) Timing Closure

🎯 VLSI Physical Design Interview Questions Addressed

  • What is the difference between OCV, AOCV, and POCV?
  • Explain recovery and removal checks for asynchronous resets.
  • How does clock gating check differ from standard setup/hold checks?