Chapter 01: SDC Fundamentals & Synthesis Basics

What this chapter covers

SDC is the text language that tells synthesis and STA what to time. This chapter is the foundation: what constraints are, the timing-path model they describe, Tcl as the substrate, object queries (get_ports, get_pins, get_cells, get_nets), units, and why the same intent must mean the same thing from synthesis through place-and-route to signoff.

You write SDC once (ideally) and consume it at every stage. Interviewers use fundamentals to test whether you understand that the tool does exactly what the constraints say — and that the dangerous errors are silent.

Worked example

get_pins returns pin objects (a cell’s A or Z); get_nets returns the wire connecting pins. set_input_delay on a net is not the same as constraining the port pin. Hierarchical pins need the correct instance path so the collection is not empty — an empty collection often applies to nothing, with no error.

A common misconception

Assuming a missing or mismatched constraint will error out. Unconstrained paths and empty collections are the usual silent failures. Another trap is writing synthesis-only shortcuts that later disagree with signoff SDC.

Sample interview answers

What is the difference between get_pins and get_nets? Pins are endpoints on cells; nets are the connections between them. Most timing constraints attach to pins or ports, not to net names by habit.

Why is SDC standardized across tools? So synthesis, P&R, and signoff can share one timing intent. Vendor wrappers exist, but the core commands (clocks, I/O, exceptions) are meant to be portable.

How do you target a hierarchical pin? Use the instance path the tool’s netlist actually has, e.g. get_pins u_block/u_flop/Q, and verify the collection size is not zero.

The paid PDF is the concept primer plus 80 interview questions, Tcl collection examples, linting/check_timing notes, and synthesis-versus-signoff constraint differences.

Library: SDC handbook · Next: Clock constraints · Related: Defining clocks in SDC, STA environment