Current Mirrors and References

Every amplifier in lesson 3 assumed a bias current that was simply "there" – an ideal current source, or a fixed gate voltage Vb. On a real chip, those currents and voltages have to be generated and distributed. Current mirrors copy one reference current to many places, and reference circuits create that first current or voltage in a way that does not drift with supply or temperature.

This lesson starts with the basic mirror, improves it with a cascode, and then turns to the bandgap reference and the low-dropout regulator (LDO) – two blocks that sit on almost every SoC.

Reading time: about 9 minutes.

4.1 Why bias needs to be distributed

A typical analog block might contain twenty transistors that each need a defined current. Setting each one with its own gate voltage would be fragile: as lesson 2 showed, drain current depends on the square of the overdrive, and the threshold voltage moves with process and temperature. A gate voltage that gives 100 µA in one corner might give 60 µA or 150 µA in another.

The robust approach is to generate one accurate current and then copy it. If every device is biased as a copy of the same reference, they all move together, and the ratios between currents – which is what most circuits really depend on – stay fixed.

4.2 The basic current mirror

Let us consider Figure 4.1. A reference current IREF flows into M1, whose gate is connected to its drain. This diode connection forces M1 into saturation and sets its VGS to whatever value carries IREF. M2 shares the same gate and source voltages, so if it is also in saturation and matched to M1, it must carry the same current density.

From the square law of lesson 2, with both devices in saturation and channel-length modulation ignored:

Iout / IREF = (W/L)2 / (W/L)1          (4.1)

A PMOS mirror works the same way, sourcing current from VDD instead of sinking it to ground. Most bias networks use both: an NMOS mirror sinks a copy of IREF out of a diode-connected PMOS, which then sources copies to PMOS loads elsewhere.

4.3 Ratioing and its practical limits

Equation (4.1) suggests any ratio can be made by changing W/L. In practice, designers build ratios from identical unit devices: a 1:4 mirror uses one unit transistor for M1 and four identical units in parallel for M2. It is recommended to keep the length the same and change only the number of units, because changing L also changes λ, the threshold voltage through short-channel effects, and the edge effects of the layout. Identical units cancel those effects to first order. Lesson 6 explains how the units are arranged in layout so that gradients across the die also cancel.

The main systematic error of the simple mirror is channel-length modulation. Including the (1 + λVDS) term:

Iout / IREF = [(W/L)2 / (W/L)1] · (1 + λ·VDS2) / (1 + λ·VDS1)      (4.2)

Thus, a simple mirror is adequate for coarse biasing, but not for a load in a high-gain stage or for an accurate current reference.

4.4 The cascode mirror

Lesson 3 showed that stacking a common-gate device on top of a transistor multiplies its output resistance by about gm·ro. The same idea applied to a mirror gives the cascode current mirror. A second diode-connected device is stacked on M1 to generate the cascode gate bias, and a cascode device is stacked on M2. The cascode holds the drain of M2 at almost the same voltage as the drain of M1, which removes most of the λ error of (4.2), and the output resistance rises to approximately

Rout ≈ gm4·ro4·ro2                (4.3)

where M4 is the output cascode device. As always with cascodes, the price is headroom. In the simple stacked version, the output must stay above about VTH + 2Vov, because the cascode gate sits two gate-source drops above ground. Low-voltage variants bias the cascode gate separately and reduce the minimum output voltage to about 2Vov, which matters at supplies near 1 V. The designer chooses between them based on how much swing the output needs.

4.5 The need for a reference

A mirror copies a current, but something must create the first one. Let us consider the simplest option: a resistor from VDD into a diode-connected transistor. The current then depends on VDD, on the resistor value (which can vary by 10 to 20 percent across process in many technologies), and on VTH, which changes with temperature. None of these is acceptable for an ADC reference or a regulated supply.

The requirement is therefore a quantity that is fixed by physics rather than by the supply or the process. The standard answer is the bandgap reference, which produces a voltage of about 1.2 V that changes very little over temperature. A reference current is then made by forcing that voltage across a resistor, often an accurate or trimmed one.

4.6 The bandgap principle: PTAT plus CTAT

The bandgap combines two voltages whose temperature slopes have opposite signs:

• CTAT (complementary to absolute temperature) – the base-emitter voltage VBE of a bipolar junction falls by roughly 2 mV for every kelvin. In CMOS, the bipolar device is usually a parasitic PNP formed by the p+ diffusion, the n-well and the substrate.
• PTAT (proportional to absolute temperature) – if two such junctions carry the same current but one has n times the area, the difference in their base-emitter voltages is ΔVBE = VT·ln(n), where the thermal voltage VT = kT/q rises by about 0.086 mV/K.

Scaling the PTAT term by a factor K and adding it to VBE gives

VREF = VBE + K·VT·ln(n)            (4.4)

When K is chosen so the two slopes cancel, the result is flat with temperature to first order, as Figure 4.2 shows. The value at which this happens is close to the silicon bandgap voltage extrapolated to absolute zero, which is why the circuit carries the name.

4.7 The LDO as a block

A bandgap produces an accurate voltage but cannot supply current. A low-dropout regulator (LDO) turns that reference into a supply rail. Conceptually, it has four parts:

1. Pass device – usually a large PMOS between the input supply and the output, which carries the load current.
2. Feedback divider – two resistors R1 and R2 that scale the output down for comparison.
3. Error amplifier – compares the divided output with VREF and drives the gate of the pass device.
4. Output capacitor and compensation – keep the loop stable across load currents, a topic lesson 5 introduces with phase margin.

The feedback forces the divided output to equal VREF, so

VOUT = VREF · (1 + R1 / R2)        (4.5)

For example, with VREF = 1.2 V and R1/R2 = 0.5, VOUT = 1.8 V. The dropout voltage is the minimum difference between input and output at which the regulator still holds VOUT, typically on the order of a hundred to a few hundred millivolts. Analog blocks such as PLLs and ADCs often get their own LDO, because it also attenuates noise coming from the shared supply – a property measured as power-supply rejection ratio (PSRR). Lesson 8 and lesson 10 return to why that matters on a noisy digital SoC.

4.8 Interview questions

How does a basic current mirror work? A diode-connected transistor converts the reference current into a gate-source voltage. A second transistor with the same VGS, in saturation, carries a current scaled by the W/L ratio.

What limits the accuracy of a simple mirror, and how is it improved? Different drain voltages combined with channel-length modulation, plus device mismatch. A cascode mirror equalizes the drain voltages and raises output resistance to about gm·ro², and careful layout reduces mismatch.

Why are ratios built from unit devices rather than different W/L? Identical units with the same L share the same short-channel and edge effects, so those cancel in the ratio.

Explain the bandgap principle. VBE falls by about 2 mV/K, ΔVBE between two junctions of different density rises with VT. Adding a scaled ΔVBE to VBE cancels the slopes and gives about 1.2 V, stable over temperature.

What sets the output of an LDO? VOUT = VREF(1 + R1/R2), held by an error amplifier driving a pass transistor.