ICC2: 13. Chip finishing and post-fill Cheat Sheet

This stage covers chip finishing: filler insertion and filler DRC, boundary and corner cells, tap cell distance, metal fill and isolated vias, signoff DRC, and the routing, antenna and LVS checks that close out the block.

Sanity check cheat sheet

One row per command card. Read left to right: the check, the command that answers it, then what a healthy result, a result to review and a hard stop look like.

Card	Check and when	Command	Healthy	Review	Hard stop
H-01	Block legal before fill Before fillers	`check_legality` `report_design -routing`	The block is legal, so filler insertion starts from a clean state, and the routing statistics are recorded.	The block is legal, but unexplained fixed cells block the filler rows.	Illegal cells are present, or routing is unfinished.
H-02	Filler insertion After last ECO	`create_stdcell_fillers -lib_cells $FILLER_CELLS` `connect_pg_net -automatic`	The filler list is ordered from largest to smallest, matches the library fillers, and PG nets are reconnected.	The filler list differs from the filler set for the design type in the library.	Gaps remain that check_legality cannot flag, or PG is unconnected on fillers.
H-03	Filler DRC After filler insertion	`remove_stdcell_fillers_with_violation -check_only true` `remove_stdcell_fillers_with_violation`	The check-only report is empty, and one removal run leaves nothing further to remove.	Several removal runs were needed; each removal is listed and approved.	Fillers still violate rules after removal, or decap cells were lost without a plan.
H-04	Boundary and corner cells After floorplan and after fill	`check_boundary_cells` `check_targeted_boundary_cells`	No boundary cell is missing, wrong or misoriented, and short rows are explained.	Violations occur only beside macros or voltage area edges, and each is approved.	An end-cap or corner cell is missing on a core edge.
H-05	Tap distance After tap insertion	`create_tap_cells -lib_cell <tap_lib_cell> -distance <um>`	The tap pattern follows the foundry rule, and extra taps at row edges and beside macros are expected.	Rows beside hard blockages were skipped, with a recorded reason.	Tap distance exceeds the rule, or taps were added after global placement.
H-06	Metal fill record After routing	`signoff_create_metal_fill` `set_extraction_options -real_metalfill_extraction floating`	Fill was built on a near-clean block, and real fill extraction is enabled for timing.	Fill was built while DRC was still open, or only virtual fill is used for timing.	Fill is missing on a required layer, or no licence or runset is recorded.
H-07	Isolated vias After metal fill	`signoff_fix_isolated_via -check_only true` `signoff_fix_isolated_via`	The per-layer summary shows none left, and the range option comes from the foundry.	Some remain in congested or sparse areas, each listed and approved.	The range option is unset, or the remaining vias were not reviewed.
H-08	Signoff DRC After fill and trim	`set_app_options -name signoff.check_drc.runset -value <foundry_runset>` `save_block` `signoff_check_drc`	Zero errors per rule, and the runset matches the process.	Errors exist only in child cells, or are under an approved waiver.	Any error on fill or fillers, or an error count at the per-rule cap.
H-09	Routing, antenna, shorts After DRC fixes	`check_routes -antenna true` `check_lvs`	No opens, shorts, floating shapes or antenna violations.	A count sits at the default per-type report cap, so more may be hidden.	Any open or short, or antenna violations remain after repair.

Command cheat sheet

ICC2 commands. Angle brackets are placeholders, and values shown are examples, not project limits. A dagger (†) marks a command the notes behind this book do not fully cover; it is shown without options, so confirm it with man or help in your release.

Filler cells
`create_stdcell_fillers -lib_cells $FILLER_CELLS`	Filler instances named xofiller in row gaps, using the ordered list. Changes the session; record it.
`remove_stdcell_fillers_with_violation -check_only true`	Report of fillers that break DRC, written to block_fillers_with_violation.rpt. Removes nothing.
`remove_stdcell_fillers_with_violation`	Deletes xofiller instances that break DRC against signal routing. May need repeated runs. Changes the session; record it.
`remove_cells [get_cells xofiller*]`	Removes every ICC2 filler. Changes the session; record it.
`connect_pg_net -automatic`	Reconnects power and ground pins of new cells from the power intent. Changes the session; record it.
Boundary and tap cells
`set_boundary_cell_rules -left_boundary_cell <cell> -right_boundary_cell <cell>`	Stores the end-cap and corner rules used by later compile steps. Changes the session; record it.
`compile_boundary_cells`	Boundary and corner cells inserted per the stored rules. Changes the session; record it.
`check_boundary_cells`	Report of missing, wrong or misoriented boundary and corner cells.
`create_tap_cells -lib_cell <tap_lib_cell> -distance <um>`	Tap cell array meeting the distance rule, run before global placement. Changes the session; record it.
Legality
`check_legality`	Placement legality report; run before fillers and again after any ECO placement.
`check_legality -cells <cells>`	Legality of selected cells only.
Metal fill and vias
`signoff_create_metal_fill`	Metal fill through IC Validator, needing a licence and a routed block.
`signoff_create_metal_fill -mode remove`	Removes all metal and via fill before a re-run. Changes the session; record it.
`set_extraction_options -real_metalfill_extraction floating`	Real fill shapes included as floating metal in extraction. Changes the session; record it.
`signoff_fix_isolated_via -check_only true`	Isolated-via summary per layer, with no edits.
`signoff_fix_isolated_via`	Inserts fixing vias and removes unused dummy fill. Changes the session; record it.
Signoff DRC and route checks
`signoff_check_drc`	IC Validator DRC with an error data file and results in the run directory.
`signoff_check_drc -auto_eco true`	Incremental DRC on areas changed since the last run.
`signoff_fix_drc`	Repair loops on top-level violations and a result_summary.rpt. Changes the session; record it.
`check_routes`	Routing DRC, open nets, antenna and voltage area findings in zroute.err.
`check_routes -antenna true`	Antenna findings on routed nets.
`check_lvs`	Shorts, opens and floating net shapes on signal, clock and PG nets.