How do you estimate required placeable area from target utilisation?
From PDVerse PnR Interview Handbook, part of the pdVerse Mentor Guide
Last updated:
Short Answer
The formula is simple division, but the interpretation is where people trip up: required placeable area = counted cell area / target utilisation, not the other way around. 60 = 1,000,000 um^2 of placeable area total โ not 600,000 um^2 with 60% left as margin.
Technical Explanation
- This number is a starting hypothesis, not a finished floorplan โ it tells you roughly how big the placeable region needs to be, nothing about its shape, macro layout, or whether it's actually buildable.
- Once you have that number, you still have to test it against real constraints: does it fit legal rows, does it accommodate macros and their channels, is there enough room for pin access and PG reservation, and does a placement/route trial actually converge without congestion or timing blowing up.
- Treat the formula's output as day-one sizing, then validate and adjust โ never treat it as the final signed-off core area.
Visual Verification
Required Core Area = Total Cell Area / Target Utilization. Sizing must account for subsequent buffer insertion, CTS tree sizing, and DRC fix space during physical implementation.
Formula Or Decision Rule
Required area [um^2] = counted placeable area [um^2] / target utilisation [unitless].
What To Check
- Warning sign: The calculation fits numerically but leaves no legal rows or routing access around macros.
- Inspect: choose one affected region, macro, row, pin, path, or net and trace the physical cause.
- Correct: Increase or reshape the usable plan based on the failed resource, and document why the mathematical minimum was insufficient.
Command Checks & Actions
report_design-floorplan: reports the floorplan state understood by the tool
Run only the commands needed for this question. Save the report with the floorplan version and analysis context.
Healthy, Suspicious & Hard-stop Results
- Healthy: Divide the counted placeable object area by the declared target utilisation. The result is a mathematical starting point, not a final implementable core.
- Hard stop: required legality or physical feasibility is missing or unexplained.
Common Mistake
The Trap: Do not hide the symptom with an arbitrary utilisation, halo, channel, blockage, pin move, or die-size change.
What The Interviewer Is Testing
โ to measurable physical evidence and an owned correction.
Physical Design & Planning Handbook
Master ASIC Physical Design Planning & Floorplanning
Dive into 14 comprehensive chapters covering netlist sanity, FinFET grids, macro placement, power grids, CTS, and timing budgeting.
Offline PDF Bundle
Want all 1109 questions offline?
Get the complete 4-book PDF bundle (PnR, STA, MMMC, Low Power) with a clickable table of contents - no ads, no internet needed.

Continue practising