IntermediateQuestion 21 of 84Source PDF page undefined

How do you find missing constraints and unsafe timing exceptions?

From PDVerse PnR Interview Handbook ยท pdVerse Mentor Guide

Short Answer

Audit timing coverage and the meaning of exceptions in every required scenario. A clean slack summary can hide paths that were never checked or were removed from analysis by an overly broad exception.

Technical Explanation

Look for missing clocks, missing interface delays, unintended startpoints/endpoints, and empty object selections. Inspect representative input-to-register, register-to-register, and register-to-output paths. Check that generated clocks reach the intended registers and that case analysis matches the active mode. A syntactic SDC check cannot establish all of this. False paths remove specified timing relationships from analysis, so each needs a functional reason. Multicycle constraints change the selected launch/capture edge relationship; they are not a shortcut for making slow logic pass. A common setup multicycle adjustment requires deliberate hold-edge treatment as well, but the exact commands depend on the clock relationship and constraint options. Derive and inspect the edges instead of applying a memorized pair everywhere. Validate exceptions against the architecture or verification evidence, review selected object counts, and examine the resulting timing report. A pattern intended for one synchronizer can unintentionally match an entire interface. Use the tool's timing-check and exception-report capabilities with your release's supported options, and retain the reports with the handoff.

Common Mistake

Explaining false paths as 'paths that fail timing' or assuming a positive worst slack proves complete coverage.

Follow-up Question & Model Response

What evidence makes a multicycle path legitimate? The functional protocol must guarantee the intended capture opportunity, and the reported setup/hold edge relationships must match that guarantee.

Practical Example

A wildcard false-path constraint aimed at debug_status* also matches a newly added functional status bus. The run appears cleaner while a real transfer loses checking. Compare selections before and after the netlist update.

Original guide diagramHow do you find missing constraints and unsafe timing exceptions?
How do you find missing constraints and unsafe timing exceptions?, illustrating the physical design concept.