An engineer says 'silicon always beats signoff, so our margins must be too conservative.' How do you respond, and what's the danger in that reasoning?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Technical Explanation
Observing that real silicon consistently outperforms signoff timing might indicate recoverable over-pessimism worth investigating, but it can also be a dangerous overgeneralization masking real risk, because typical-part correlation samples used for that observation don't include the tail or worst-process parts that signoff margins actually exist to protect.
Timing-path Reasoning
If the parts measured for the 'silicon beats signoff' observation are drawn from typical production samples, they inherently exclude the rare worst-case process, voltage, or temperature combinations that the signoff margin was designed to cover. Concluding from typical-part behavior that all margin is excess pessimism ignores that the margin's job is precisely to cover parts you haven't measured — the tail of the distribution. Additionally, a long-standing robustness margin whose original justification has been forgotten should never be stripped out just because no one currently remembers why it's there; it is presumed load-bearing until proven otherwise.
Expected Result
Any margin-reduction decision should be backed by tracing the specific pessimism source (e.g., confirming via AOCV/POCV analysis, CRPR credit, or window-aware crosstalk recalculation that a specific number is provably excess) rather than a blanket inference from typical-part silicon correlation.
Failure Symptoms
Removing margin based solely on 'our chips always come in faster than signoff predicts' risks yield/reliability failures on the worst-corner die that was never represented in the correlation sample, potentially surfacing only after volume production ramps and tail parts appear.
Root Cause
Sampling bias in the silicon correlation data — typical parts measured in bring-up or characterization do not represent the full process/voltage/temperature distribution that signoff margins are meant to guard against, particularly rare worst-case corners like those exposed by temperature inversion.
Mentor Note — Debugging Procedure
Before reducing any margin, identify the specific mechanism believed to be overpessimistic (flat OCV vs AOCV/POCV, missing CRPR credit, naive crosstalk summation, etc.), verify with a proper analysis technique (e.g., the pessimismrecovery ladder: tightening windows, realistic multi-aggressor alignment, actual coupling factors) that the margin is genuinely excess, and never remove a longstanding margin whose original justification is simply forgotten. 'Silicon always beats signoff' might indicate recoverable over-pessimism worth chasing down mechanism by mechanism, but treating it as blanket proof that all margin is excess is a dangerous overgeneralization — the correlation sample never included the worst-process tail parts that the margin exists to protect.
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