How do you specify save and restore signals with set_retention_control?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Explanation
set_retention_control ties the abstract save/restore behavior declared by set_retention to actual logic nets and their active sense, telling the tool exactly which net and polarity triggers a save operation and which triggers a restore.
Implementation Walkthrough
set_retention_control -domain -save_signal {sig high|low} restore_signal {sig high|low}. Both save_signal and restore_signal must be nets, not ports or pins. Mychip uses one shared powercontroller net at opposite senses: set_retention_control PD_COP_RET -domain PD_COP -save_signal {U_PC/SRE high} -restore_signal {U_PC/ SRE low}.
Command
set_retention_control PD_COP_RET -domain PD_COP -save_signal {U_PC/SRE
high} -restore_signal {U_PC/SRE low}Switch-by-switch
-save_signal {net high|low}: the net and active sense that triggers
a save; -restore_signal {net high|low}: the net and active sense
that triggers a restore. Additionally, -assert_r_mutex, assert_s_mutex, and -assert_rs_mutex provide a built-in consistency
check that save and restore signals are mutually exclusive -- the
clearest error-prevention mechanism for retention correctness,
though these options are currently parsed but ignored in this
version of the tool.Expected Tool Behavior
The mapped retention cell's SAVE/RESTORE pins get wired to the specified nets at the specified polarities, giving the tool the information needed to check that save and restore are never asserted at the same time.
Example
Mychip's shared U_PC/SRE signal drives save (active high) and restore (active low) for PD_COP_RET.
Common Mistake
Pointing -save_signal or -restore_signal directly at a top-level port instead of the net it drives -- the option requires a net.
Likely Error Or Warning
This topic is not covered in enough depth here to give a fully reliable answer for a literal error message; the mutex-assertion options exist specifically to catch simultaneous save+restore assertion, which is the classic illegal retention condition.
Debugging Approach
Trace the save/restore net (e.g. U_PC/SRE) back through the power controller to confirm it can never assert save and restore concurrently.
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