Low Power Interview Questions and Answers

Low-power design is the discipline of deliberately controlling how much energy and current a chip draws, because as process nodes have shrunk, both the active (switching) power…

Dynamic power is the power consumed only when circuits are actively switching (charging/ discharging capacitance, and momentary short-circuit current), while leakage (static)…

A CMOS gate's power breaks down into three pieces: a leakage component (subthreshold conduction, gate-oxide tunneling, and reverse-biased junction leakage), an…

Leakage power in a CMOS transistor comes from current that flows even when the transistor is nominally 'off' — this comes from subthreshold conduction, gate-oxide tunneling…

HVt cells have a higher threshold voltage, which gives them lower leakage power and lower dynamic power but a larger delay (slower switching); LVt cells have a lower threshold…

Leakage power is temperature-dependent — this dependence is well characterized in device data, and it is exactly why the industry-standard worst-case power signoff corner is…

Process corner describes where on the fast-to-slow manufacturing spectrum a given chip landed, and characterization data shows that a 'fast' wafer corner delivers much better…

The worst-case power corner is the PVT (process, voltage, temperature) combination defined as fast process, maximum voltage, and maximum temperature — the combination that…

Reducing supply voltage reduces power because power is a function of the square of the voltage — so even a modest voltage cut yields a much larger power reduction — but the…

A power domain is a grouping of design blocks that share one common power supply — blocks sharing one common power supply — and every power domain must have exactly one primary…

A classic multi-voltage example is a top-level domain running at 1.0V that contains three subblocks each running at a different fixed voltage: an ARM926 processor at 1.2V, a DMA…

A power domain can be operated at a static fixed voltage (simply set once for its function), can be switchable (fully powered on or off via power gating), can use variable…

A supply net in UPF is a conductor that carries a supply voltage or ground reference to a power domain (created with create_supply_net), while a supply port is the UPF-level…

A supply set is an abstract, domain-independent collection of supply nets grouped around two functions — power and ground — accessed as SS.power and SS.ground, and created with…

The primary power net (together with the primary ground net) is the main supply that every cell inside a power domain is implicitly connected to, unless a cell has a special…

Primary power is the main supply that gets switched off when a domain shuts down; backup (retention) power is a separate always-on supply that keeps specific logic — like a…

A switched power supply (sometimes called a virtual or internal supply) is one that a power switch cell can turn fully on or off — it disappears electrically when the domain…

Power-down means turning off a domain's primary supply (via a power switch controlled by a sleep signal), while power-up means re-enabling that supply and bringing the domain…

A power state table (PST) is a structured list of the legal voltage/state combinations a design's supplies can be in — created in UPF with create_pst and populated with…

A valid signal is one driven to a proper logic-0 or logic-1 level; an invalid signal is one that is floating or sitting at some intermediate voltage — which is exactly what…

An isolation cell is a special standard cell placed on a signal that leaves a power domain, whose job is to hold that signal at a known, valid logic value whenever the driving…

An AND-type isolation cell clamps its output to logic-0 when isolation is active (an AND gate forces a 0 through one input); an OR-type isolation cell clamps its output to…

A level shifter is a special cell placed on a signal crossing between two power domains that operate at different voltages, converting the signal's voltage swing from the source…

A low-to-high (LH) crossing occurs when a signal travels from a lower-voltage domain into a higher-voltage domain; a high-to-low (HL) crossing occurs when a signal travels from a…

An enable level shifter is a single cell that combines the functions of isolation and level shifting, so one cell both clamps the output to a safe value when the source domain is…

A power switch is a special cell (or bank of cells) placed on a domain's power or ground connection that can electrically connect or disconnect that domain from its supply rail,…

A header switch is placed on the VDD (power) side of a domain, between the always-on power rail and the domain's switched/virtual power rail; a footer switch is placed on the VSS…

A mother-daughter switch configuration uses two power switch cells of different strength in series stages — a weaker 'daughter' switch that turns on first, followed by a stronger…

A virtual rail is the switchable (switched) power or ground net delivered to a shutdown domain through a power switch, as opposed to the always-on primary supply net that feeds…

A switched ground net is the ground rail delivered to a domain through a footer switch — it is electrically disconnected from the always-on ground (VSSG) whenever the footer…

The isolation control signal is the logic net that tells an isolation cell whether to pass its data input through normally or clamp its output to the fixed isolation value;…

SAVE and RESTORE (sometimes NRESTORE, active-low) are the control signals on a retention register that tell it to copy its current state into a backup latch before power is…

"Save" is the operation of copying the current value of the main flip-flop into an internal backup latch just before the domain loses power; "restore" is the operation of copying…

An always-on cell is a standard cell that is functionally identical to an ordinary buffer, inverter, or similar gate, but is powered from a backup/true supply (VDDG/VSSG or…

Power intent is the complete specification of a design's power architecture — its power domains, supply nets, voltage levels, isolation/level-shifter/retention/switch strategies,…

create_power_domain declares a new power domain — a named grouping of design elements (instances, ports) that share power management requirements — at a specified scope in the…

Multivoltage design is an architectural and implementation technique in which different blocks of a chip operate at different, fixed supply voltages, so that…

A voltage crossing is any signal path where the driving side and the receiving side belong to power domains operating at different voltages, requiring a level shifter (and…

check_mv_design is a command that checks the electrical correctness of a multivoltage design against its UPF power intent — verifying that supply voltages are properly assigned,…

A missing isolation cell is a boundary between a shutdown domain and an always-on (or differently-timed) domain where no isolation strategy has clamped the crossing signal, so…

A power domain groups design elements that share the same power-supply behavior. create_power_domain declares that group and its scope in the hierarchy. A power domain is…

create_supply_port declares a port-level connection point associated with a domain; create_supply_net creates the actual net object that a supply voltage travels on.…

A supply net is a single conductor. A supply set (create_supply_set) is a higher-level, abstract object that bundles a power function and a ground function (accessed as SS.power…

set_domain_supply_net takes an already-created supply net and designates it as a domain's primary power or primary ground. Once set, every cell inside that domain is implicitly…

set_isolation defines which ports of a domain get isolation cells, what supply powers those isolation cells, and what fixed (or latched) logic value they clamp to once the domain…

The -location option decides where an isolation cell physically/ logically sits relative to the domain boundary: inside the domain being isolated (self), in the surrounding…

clamp_value tells the isolation cell which logic value to force on its output once isolation is active: 0 forces a logic low (built as an AND-type gate), 1 forces a logic high…

set_level_shifter defines a strategy for inserting level-shifting cells wherever a signal crosses a voltage boundary, specifying which ports it applies to, the direction of…

-location self places the level shifter physically/logically inside the domain whose boundary is being crossed; -location parent places it just outside, in the surrounding…

set_retention declares which state elements (typically flip-flops) in a domain need retention hardware, and which dedicated always-on retention power/ground net backs the…

set_retention_control ties the abstract save/restore behavior declared by set_retention to actual logic nets and their active sense, telling the tool exactly which net and…

create_power_switch declares a virtual (abstract) power-switch instance within a domain's scope. It gates an always-on input supply through to a switched output supply under the…

map_power_switch takes the abstract switch created by create_power_switch and binds it to one or more real library cells, so the tool can actually instantiate physical switch…

A virtual (switched) rail isn't produced by one dedicated command -it emerges from the combination of declaring a separate supply net inside the shutdown domain and making a…

A power state table enumerates every legal combination of voltage/ off states across a set of supplies, giving each combination a named mode that other tools and checks can…

Always-on control paths are the signals -- sleep, acknowledge, save, restore, isolation-enable -- generated by the power controller that must keep working correctly even while…

A feedthrough path is a signal path that passes straight through a cell or macro from one side to the other without being logically transformed. It's flagged specifically in the…

Nested power domains arise naturally from scoping create_power_domain calls to sub-instances that already sit inside a bigger domain's elements -- there's no separate 'declare…

For the tool to recognize and correctly use a low-power cell -isolation, level shifter, retention, clock gate, or always-on -- the Liberty library must mark it with specific…

A handful of report_* and query_* commands let you inspect what the tool actually built after UPF is loaded and power-management cells are inserted -- domain contents, mapped…

Mychip is a full worked example that gives you a real four-domain chip instead of a toy two-domain sketch. PD_MYCHIP is the top-level, always-on 1.0V domain that wraps…

Nested domains are built the ordinary way — create_power_domain with -elements naming the sub-instances, and -scope steering where in the hierarchy the domain is rooted. On top…

A power domain has two distinct notions: its scope, which is the hierarchy level that acts as the domain's root, and its extent, which is the actual set of design elements that…

A top-level power-intent file follows a consistent shape: declare the domains, then declare the supply nets reused across them, wire each domain's primary power/ground, and…

A supply set is an abstract collection of two functions — power and ground — accessed as SS.power/SS.ground, and it is domain- independent by default. Supply sets relate to each…

UPF lets you flag certain combinations of supply states as simply not allowed to occur. The mechanism is the add_power_state command applied to a supply, group, or domain object:…

A power switch is built with create_power_switch, given an input supply port, an output supply port, and a control port that drives it on or off. The on_state and off_state…

A header switch sits between the power rail and the power supply pins of the power-down domain, cutting VDD to the domain. A footer switch instead sits on the ground side,…

In PD_COP, the domain's primary power net is set to VDD1p0_SW — a supply net created specifically inside PD_COP (create_supply_net VDD1p0_SW -domain PD_COP) that is the switched…

A retention strategy is declared with set_retention -domain retention_power_net -retention_ground_net -elements, naming the always-on rail that backs up the listed state…

When more than one set_isolation strategy could apply to the same element, the tool resolves the conflict using a fixed precedence order, from highest to lowest: (1) strategies…

set_level_shifter's -location option controls where the levelshifting cell physically sits relative to the domain boundary it's shifting. -location self places it inside the…

Always-on logic is needed wherever a signal must keep functioning even while the domain around it is shut down — retention registers, isolation cells, retention control paths,…

By default, whenever the tool punches a new hierarchical pin to carry a retention, switch, or isolation control signal down through the hierarchy, it automatically derives a…

analyze_mv_feasibility (with -isolation, -enable_level_shifter, retention, or -level_shifter) checks whether the power management cells your UPF strategies call for can actually…

set_isolation's -clamp_value option (0, 1, or latch) determines what value the isolated output is forced to when isolation is active: 0 uses an AND-gate-style clamp, 1 uses an…

If a retention strategy's -retention_power_net/retention_ground_net (or -retention_supply_net) points at a supply that is not genuinely always-on relative to the domain being…

set_retention_control's -save_signal and -restore_signal each carry an explicit sense ({sig high} or {sig low}). If the declared sense doesn't match how the signal is actually…

UPF's abstract supply-set model doesn't automatically know which physical pin on a real library cell corresponds to which logical supply function. set_pin_related_supply -pins…

Physical signoff for an MV design centers on three pieces: secondary PG placement constraints, which govern where power-management cells (level shifters, isolation cells, enable…