What is a retention signal (save/restore), and why is it needed?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Definition
SAVE and RESTORE (sometimes NRESTORE, active-low) are the control signals on a retention register that tell it to copy its current state into a backup latch before power is removed, and to copy that saved value back into the main flip-flop after power returns.
Mentor Explanation
A retention cell is a regular flip-flop or latch plus an additional save-latch that holds state when primary power is off and restores it when power returns. The SAVE and RESTORE/NRESTORE control pins drive that behavior, and — just like isolation control signals — they must be driven through always-on (AO) cells, since the retention cell's control pins reside logically 'inside' the shutdown domain's boundary but must stay live throughout the power-down period. Without these signals, a shutdown domain's flip-flops would simply lose their state on power-down and require a full reset on wake-up, which is exactly the delay and re-initialization cost that retention exists to avoid.
Example
A CPU core about to sleep asserts SAVE on all its retention flops just before its power switch turns off, preserving register-file state; on wake-up it asserts RESTORE so those flops reload their saved values instead of coming up in an unknown reset state.
Why It Matters
This distinguishes retention from a simple reset-and-reinitialize strategy — retention buys faster, lower-energy recovery precisely because SAVE/RESTORE preserve state across the power-off interval.
Common Beginner Mistake
Forgetting that SAVE and RESTORE (or NRESTORE) being simultaneously active is an illegal condition — SAVE=1 and NRESTORE=1 (restore active) at the same time is not allowed.
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