ExpertQuestion 26 of 50Source: Synopsys IC Compiler II Multivoltage User Guide: Controlling Level-Shifter Cell Locations, Multiple Power Domains in a Single Voltage Area, Reporting Multivoltage Paths; Synopsys VC LP User Guide: Low-Power Static Checking

Level shifters or isolation cells landed in the wrong voltage area. How do you debug it?

From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide

Short Answer

The strategy -location decides which domain a cell belongs to, and the domain decides which voltage area it may be placed in, so a cell in the wrong VA is almost always a location or domain problem, not a placer bug. Start from check_mv_design (ICC2), then trace the cell with report_mv_path -cell (ICC2) to see its strategy, supplies and domain. Fix the strategy or make the missing supply available, then re-insert rather than hand-moving the cell.

Technical Reference DiagramLevel shifters or isolation cells landed in the wrong voltage area. How do you debug it?
Floorplan of VA_DSP on VDDdsp at 0.9 V next to the PD_MYCHIP top area at 1.0 V: a low-to-high level shifter placed inside VA_DSP with no VDD1p0 strap reachable (red), and the corrected placement in the parent area where both rails are present.

Technical Explanation

  • Location rules: for set_level_shifter (UPF), -location self uses the domain whose port is shifted, parent its parent; ICC2 adds automatic as its default, IEEE 1801 defaults to self.
  • Supply rule: whatever location you pick, the cell needs its supplies available there; a low-to-high shifter needs both rails.
  • Shared VA: with shared_voltage_area (UPF) several domains with equivalent primaries sit in one VA, so a cell can legally land in a VA named after another domain.
  • Placement follows domain: ICC2 places a cell inside the VA of its power domain, so a cell in an unexpected VA was usually inserted into an unexpected domain.
  • Trace: report_mv_path -cell (ICC2) prints the strategy, supply, inputs, outputs and domain, or the reason insertion or association failed.
  • Second opinion: check_lp -stage design (VCLP) checks the implemented cells against the UPF independently of ICC2.
# [UPF]  design.upf
set_level_shifter LS_DSP_OUT -domain PD_DSP -applies_to outputs -rule low_to_high -location parent
# [ICC2]  icc2_shell
check_mv_design
report_mv_path -cell U_DSP/LS_DSP_OUT_0
report_power_domains
# [VC LP]  vc_static_shell
check_lp -stage design
report_violations -app LP

What To Check

  • The strategy -location matches where the supplies actually exist.
  • The cell domain matches the domain of the VA it sits in, or the VA is shared.
  • Secondary PG for dual-rail cells is present in that VA.
  • ICC2 and VC LP agree after the fix.

Command Checks & Actions

UPF (design.upf)set_level_shifter LS_DSP_OUT -domain PD_DSP -applies_to outputs -rule low_to_high -location parent

Put the shifter where both supplies exist

ICC2 (icc2_shell)check_mv_design

List MV violations, including unavailable supplies

ICC2 (icc2_shell)report_mv_path -cell U_DSP/LS_DSP_OUT_0

Show the cell strategy, supplies and domain

ICC2 (icc2_shell)report_power_domains

Confirm which domain owns the hierarchy the cell was inserted in

VC LP (vc_static_shell)check_lp -stage design

Independent check of implemented cells against the UPF

Healthy, Suspicious & Hard-stop Results

  • Healthy (illustrative): check_mv_design is clean and every LS_DSP_OUT cell reports PD_MYCHIP as its domain.
  • Suspicious (illustrative): check_mv_design is clean, but VC LP reports a shifter whose output supply differs from the UPF.
  • Hard stop: check_mv_design reports an unavailable supply on LS_DSP_OUT, or cells sit in VA_DSP with no VDD1p0 strap.

Common Mistake

The Trap: Dragging the misplaced cells into the right VA and running legalization.

  • The netlist still puts them in the old domain, so the next create_mv_cells or ECO recreates the problem, and the UPF saved for PT is wrong.

What The Interviewer Is Testing

  • Do you know that location controls domain, and domain controls VA?
  • Would you check supply availability before moving cells by hand?

Follow-up Question & Model Response

"When would you deliberately put a level shifter in the switchable domain?"

Candidate Model Response: When the receiving side has no room or no route, and the switchable VA already carries the needed rails. For example, a high-to-low shifter into PD_DSP can sit in VA_DSP if the input rail is present there. The cost is secondary PG in that VA and a cell that shares the fate of PD_DSP when it is off. That is acceptable here because the shifter only feeds PD_DSP logic, which is off at the same time.

Practical Example

Design Scenario: (illustrative) In MYCHIP, PD_DSP runs on the external VDDdsp at 0.9 V and drives PD_MYCHIP at VDD1p0. The shifter strategy said -location self, so 32 shifters went into VA_DSP, which has no VDD1p0 strap. check_mv_design flagged the missing supply. Changing the strategy to -location parent moved them into the top area, where both VDDdsp and VDD1p0 are routed, and both checks came back clean.

Low-Power & UPF Handbook

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