IntermediateQuestion 38 of 60Source: Synopsys IC Compiler II Multivoltage User Guide: Specifying Isolation Strategies and Creating Supply Nets; Synopsys IC Compiler II Tool Commands: connect_pg_net, check_mv_design

How are the PG pins of dual-rail cells connected, and how do you check them?

From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide

Short Answer

A dual-rail cell has its primary PG pins on the supply of the domain it sits in and its backup pin on the supply the UPF strategy names, such as the isolation supply. connect_pg_net -automatic (ICC2) derives those connections from the committed UPF and the library PG pin data, so you do not wire them by hand. You then check them with check_mv_design -pg_netlist (ICC2), because the default check_mv_design (ICC2) run skips PG net and PG connection checks.

Technical Reference DiagramHow are the PG pins of dual-rail cells connected, and how do you check them?
Symbol of a dual-rail isolation cell in PD_COP with three PG pins labelled by their UPF source: VDD pin to VDD1p0_SW from the PD_COP primary supply set SS_COP, backup VDDB pin to VDD1p0 from -isolation_supply SS_AON, VSS pin to the common VSS, plus the command connect_pg_net -automatic (ICC2) beside it.

Technical Explanation

  • Primary pins follow the domain the cell belongs to, for example VDD1p0_SW for a cell in PD_COP.
  • Backup pins follow the strategy supply: -isolation_supply for isolation, -retention_supply for retention, the always-on supply for AO buffers.
  • Modern strategy: set_isolation ... -isolation_supply SS_AON -isolation_signal U_PC/ISE -isolation_sense high (UPF), with supply sets carrying power and ground.
  • Legacy form (still accepted by ICC2/PT): -isolation_power_net VDD1p0 -isolation_ground_net VSS (UPF) plus a separate set_isolation_control (UPF).
  • connect_pg_net -automatic (ICC2) needs committed UPF and libraries with PG pins; it connects PG and tie pins unless -pg or -tie is given.
  • check_mv_design -pg_netlist (ICC2) checks PG nets and PG connections; -pg_pin checks PG pin rules.
  • A backup pin tied to the switched rail makes the isolation cell die with its domain, so the clamp floats.
# [UPF]  design.upf
create_supply_set SS_AON -function {power VDD1p0} -function {ground VSS}
set_isolation iso_cop_out -domain PD_COP -applies_to outputs -isolation_supply SS_AON -isolation_signal U_PC/ISE -isolation_sense high -clamp_value 0 -location self
# [ICC2]  icc2_shell
commit_upf
connect_pg_net -automatic
check_mv_design -pg_netlist
check_mv_design -pg_pin

What To Check

  • UPF is committed before automatic PG connection.
  • Every dual-rail cell's backup pin connects to the supply its strategy names, not the switched rail.
  • Every supply net has an operating voltage; check_mv_design -pg_netlist (ICC2) catches missing ones.
  • The connection summary shows no unexpected unconnected PG pins.

Command Checks & Actions

ICC2 (icc2_shell)commit_upf

Commits the power intent; automatic PG connection requires it.

ICC2 (icc2_shell)connect_pg_net -automatic

Connects PG and tie pins from the UPF and prints a connection summary.

ICC2 (icc2_shell)check_mv_design -pg_netlist

Checks PG nets and PG connections, which the default run leaves out.

ICC2 (icc2_shell)check_mv_design -pg_pin

Checks PG pin rules on the cells.

Healthy, Suspicious & Hard-stop Results

  • Healthy (illustrative): connect_pg_net -automatic (ICC2) connects all 24 isolation-cell backup pins to VDD1p0, and check_mv_design -pg_netlist (ICC2) is clean.
  • Suspicious (illustrative): All pins connected, but the summary lists unconnected nwell and pwell pins that you have not yet explained.
  • Hard stop: A dual-rail isolation cell in PD_COP has its backup pin on VDD1p0_SW, or a supply net has no operating voltage.

Common Mistake

The Trap: Running only the default check_mv_design (ICC2) and treating a clean result as proof the PG connections are right.

  • The default run excludes PG net and PG connection checks, so a backup pin on the wrong rail passes silently.
  • The error surfaces in power-aware simulation or, worse, as clamps that fail when PD_COP shuts down on silicon.

What The Interviewer Is Testing

  • Knows which supply each PG pin of a dual-rail cell should see.
  • Knows the default scope of check_mv_design (ICC2) and how to include PG checks.
  • Can write the modern isolation strategy and recognize the legacy form.

Follow-up Question & Model Response

"Why is the isolation cell's backup supply an always-on supply rather than the sink domain's primary?"

Candidate Model Response: The backup supply must be up whenever the clamp is needed, which is exactly when the source domain is off. For a self-located cell inside PD_COP, the primary rail is VDD1p0_SW, which is off at that moment. The isolation supply gives the cell a rail that stays on, often the same net as the sink domain primary. What matters is that the UPF names it and that it is on in every state where PD_COP is off.

Practical Example

Design Scenario: (illustrative) PD_COP (primary SS_COP on VDD1p0_SW) has 24 dual-rail isolation cells from strategy iso_cop_out at location self, with isolation supply SS_AON on VDD1p0. Cell names such as ISO_AND_X1 are illustrative. After commit_upf (ICC2), connect_pg_net -automatic (ICC2) connects each cell's VDD to VDD1p0_SW, VDDB to VDD1p0 and VSS to VSS, and reports 24 backup pins connected. check_mv_design -pg_netlist (ICC2) comes back clean. A later manual ECO cell with VDDB on VDD1p0_SW is caught on the next -pg_netlist run.

Low-Power & UPF Handbook

Read the complete low-power guide library covering power domains, level shifters, isolation clamps, state retention, and UPF signoff verification.

Low-Power VLSI & UPF Handbook — nine chaptersLow-Power & UPFDomains, isolation, retention, and multivoltage UPF. →