What is the difference between global routing and detail routing?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
Global routing decides which regions a net passes through; detail routing decides exactly which tracks, layers and vias it uses. Global routing works on a coarse grid of global routing cells (GCells) and never draws real geometry. Detail routing draws the actual metal on tracks and cleans up every design rule violation.
Technical Explanation
- A global routing cell, often called a GCell or GRC, is a small rectangle of the chip. Global routing breaks each net into segments and assigns those segments to a chain of GCells, much like planning a road trip by listing towns rather than streets.
- Each GCell edge has a capacity, the number of tracks that can cross it. Global routing compares how many nets want to cross each edge (demand) against that capacity. Any excess is overflow, and that is where the congestion map comes from.
- Because global routing is fast and complete, it is also used for estimates. It gives wire length and parasitics good enough for timing-driven optimization, and ICC2 can run it in congestion-map-only mode without keeping the routes.
- Detail routing works inside the regions global routing chose. It snaps wires to tracks from the technology file, places real vias and checks every width, spacing, end-of-line and enclosure rule as it goes.
- In between sits track assignment. It takes each global segment and gives it a specific track across the layers, so detail routing starts from something close to legal instead of from scratch.
- Detail routing first tries to connect every net even if that leaves DRCs, then runs search-and-repair iterations to clear them. Its output is metal you can hand to a DRC deck.
- A useful way to separate them in an interview: global routing answers "is there room?", detail routing answers "does this exact shape pass the rules?". A block can pass global routing and still fail detail routing if pin access is poor.
Common Mistake
The Trap: Believing that zero global route overflow means detail routing will be clean. Global routing counts tracks per region; it knows nothing about a pin that can only be reached from one side or a via that violates end-of-line spacing. Juniors who skip check_routability because "congestion is zero" often meet hundreds of pin-access DRCs in detail routing.
Follow-up Question & Model Response
"Why not skip global routing and let the detail router find paths directly?"
Candidate Model Response: Detail routing on a full block without a plan would be extremely slow, because every net would search the whole track grid. Global routing gives each net a corridor of GCells first, so the detail router searches a small area. It also spreads nets across regions before any metal is drawn, which avoids the situation where early nets take all the tracks in a channel and late nets have nowhere to go. And it gives you a congestion map you can act on before paying for detail routing.
Practical Example
Tapeout Scenario: Take a net from a flip-flop at (100, 40) to a NAND gate at (130, 80) um (illustrative), with GCells 5 um square. Global routing assigns it to GCells along a path six cells right and eight cells up, and adds one unit of demand to each edge it crosses. Track assignment puts the horizontal part on M3 track 6 and the vertical part on M4 track 11. Detail routing then adds a VIA12 and VIA23 stack at the flip-flop pin, a VIA34 at the corner and a stack back down at the NAND pin, six vias in all, finds the M3 segment 0.03 um too close to a neighbour, and moves it to track 7 during search-and-repair. The timing numbers change at each step too: after global routing the net is estimated at 70 um, after detail routing it measures 74 um with six vias, and extraction on that real shape is what signoff timing uses.
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