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What does multiple clocks at one register clock pin mean?

From PDVerse PnR Interview Handbook · pdVerse Mentor Guide

Short Answer

It can be intentional mode multiplexing or a missing exclusivity/case relationship; the report requires mode-aware interpretation.

Technical Explanation

Multiple clocks at one register pin may describe valid mode choices, or it may mean ICC2 sees two clocks active at once. The mode and MUX selection decide which interpretation is correct.

What To Check

• Warning sign: Two clocks propagate through a MUX simultaneously in a scenario meant to select one. • Inspect: Compare one named object across the related reports; the same object should tell a consistent story. • Correct: Correct mode constants or clock-group relationships from functional intent and rerun the multiple-clock check.

Command Checks & Actions

• check_timing -include {multiple_clock}: finds missing or inconsistent timing setup • report_case_analysis: shows constants applied for the active mode Run the commands in order. Each line answers a separate part of the check.

Healthy, Suspicious & Hard-stop Results

• Expected: It can be intentional mode multiplexing or a missing exclusivity/case relationship; the report requires mode-aware interpretation. • Investigate: Two clocks propagate through a MUX simultaneously in a scenario meant to select one. • Stop before floorplanning when required logic or timing coverage is missing or unexplained. Correct mode constants or clock-group relationships from functional intent and rerun the multiple-clock check.

Common Mistake

Do not assume the check passed just because ICC2 continued: Two clocks propagate through a MUX simultaneously in a scenario meant to select one. Fix or narrowly justify the named objects, then rerun the same command.

What The Interviewer Is Testing

Be ready to explain why this matters before floorplanning: Two clocks propagate through a MUX simultaneously in a scenario meant to select one.

Follow-up Question & Model Response

Model response: “I would save the report, inspect one affected object in the correct block and scenario, and make or request this correction: Correct mode constants or clock-group relationships from functional intent and rerun the multiple-clock check. Then I would reopen the clean checkpoint and rerun the same evidence.”

Practical Example

Symptom: Two clocks propagate through a MUX simultaneously in a scenario meant to select one. Corrective path: Correct mode constants or clock-group relationships from functional intent and rerun the multiple-clock check.

Original guide diagramWhat does multiple clocks at one register clock pin mean?
What does multiple clocks at one register clock pin mean?, illustrating the physical design concept.