How does the tool know which programmable spare cell a given standard cell can actually be swapped into during a freeze-silicon ECO?

Short Answer

Programmable spare cells (gate array filler cells) are matched to real standard cells via a shared psc_type_id attribute set on both the fill library cell and the standard cell library cells it can represent -- set_attribute [get_lib_cells ...] psc_type_id <N> on both sides. During the ECO flow, the tool swaps an ECO cell with a programmable spare cell based on matching psc_type_id, cell width, and voltage area -- all three have to match, not just the type id alone.

Technical Explanation

• Programmable spare cells are matched to real standard cells via a shared psc_type_id attribute, set explicitly on both the fill library cell and the standard cell library cells it can represent.
• During the ECO flow, matching requires THREE things to agree: psc_type_id, cell width, and voltage area -- not just the type id alone.
• create_stdcell_fillers -lib_cells {...} creates the actual filler cell instances in the layout from the programmable spare cell library cells.
• Removed ECO cells reuse the corresponding programmable spare cell rather than being deleted -- consistent with freeze-silicon mode's broader rule that nothing gets removed from the silicon layers.

Follow-up Question & Model Response

"Why would voltage area specifically need to match, beyond just cell width and function?"

Candidate Model Response: Because a programmable spare cell physically sits in a specific location on the die, which belongs to a specific voltage area -- mapping a standard cell from a different voltage area onto it would create a physical/logical power-domain mismatch, exactly the kind of violation fix_mv_design exists to catch and fix elsewhere in the flow.