What is SDC, and what should a physical-design SDC contain?
From PDVerse PnR Interview Handbook ยท pdVerse Mentor Guide
Short Answer
SDC expresses timing intent and the external electrical environment through constraint commands. It tells timing analysis which clocks and paths matter, and under what assumptions they should be checked.
Technical Explanation
A useful handoff defines primary clocks and generated clocks, their periods and waveforms, input and output delay budgets, and suitable input transition or driving-cell and output-load assumptions. It also includes justified timing exceptions and mode-specific settings. Depending on the flow, uncertainty, latency, electrical constraints, and other timing controls are provided in SDC or in the surrounding scenario setup. The commands select actual design objects. A syntactically valid file can still select no ports because names changed during synthesis. Broad wildcard selections can also constrain unintended objects. Therefore, read messages and inspect the resulting clocks, endpoints, and exceptions. Timing reports describe the constrained problem, not necessarily the specification the designer intended. ICC2 associates constraints with modes, corners, and scenarios. Some constraints are mode-specific, some corner-specific, and some scenario-specific. A flat SDC imported from another tool may require conversion into the appropriate ICC2 setup. Do not assume that copying one synthesis SDC into every scenario preserves the intended environment.
Common Mistake
Equating SDC with only create_clock, or claiming that zero reported timing violations means every path is constrained.
Follow-up Question & Model Response
What proves an SDC was applied correctly? Reports of actual clocks, constrained interfaces, exceptions, and coverage in each required scenario.
Practical Example
A 10 ns clock describes a nominal 100 MHz period. It does not tell the tool when data arrives at an input or how much time an external receiver needs after an output. Those interfaces require additional constraints.
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