ExpertQuestion 15 of 20Source PDF page 109

How does analyze_mv_feasibility detect CLP-style violations when power management cells cannot be mapped to library cells?

From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide

Technical Explanation

analyze_mv_feasibility (with -isolation, -enable_level_shifter, retention, or -level_shifter) checks whether the power management cells your UPF strategies call for can actually be mapped to cells available in the library. If a strategy's required isolation, enable-level-shifter, retention, or level-shifter cell cannot be mapped, the tool raises a UPF-909 error, the Tcl command returns status 0, and it produces a report of "Iso/Els cell mapping failures" or "Retention cell mapping failures" listing, per failing element: Element, Reside Domain, Strategy, Strategy Domain, Clamp, Sense, and Failure Reason.

Architecture-level Reasoning

Catching mapping infeasibility early — before compile/ implementation — avoids discovering deep into physical implementation that a strategy simply cannot be realized because no library cell matches its clamp value, sense, or supply requirements; the per-element report format gives exactly the fields needed to diagnose why each specific element failed.

Step-by-step Walkthrough

1) Run analyze_mv_feasibility with the relevant flag (-isolation, -retention, -level_shifter, or -enable_level_shifter) after UPF is loaded. 2) If any power management cell required by a strategy cannot be mapped to an available library cell, the command raises UPF-909 and returns Tcl status 0. 3) Read the generated report's per-element table: Element (the specific port/pin), Reside Domain, Strategy (the strategy name), Strategy Domain, Clamp (the clamp value requested), Sense, and Failure Reason (why no library cell matched). 4) For level-shifter feasibility specifically, the report can also be generated in HTML via -format html or by first setting set_app_options -name mv.upf.enable_amvf_html_report value true.

Command

analyze_mv_feasibility -isolation -enable_level_shifter -retention level_shifter analyze_mv_feasibility -level_shifter -format html

Switch-by-switch

-isolation: checks isolation-cell mapping feasibility. enable_level_shifter: checks enable-type level-shifter mapping feasibility. -retention: checks retention-cell mapping feasibility. -level_shifter: checks (plain) level-shifter mapping feasibility. -format html: emits the level-shifter feasibility report in HTML (equivalent to setting mv.upf.enable_amvf_html_report true).

Expected Result

A clear pass/fail feasibility check that either confirms every required power-management cell can be mapped to the library, or produces a structured per-element failure report (Element/Reside Domain/Strategy/Strategy Domain/Clamp/Sense/Failure Reason) pinpointing exactly which strategies cannot be realized and why.

Possible Implementation Error

A retention strategy requesting a clamp/sense combination for which the target library has no matching retention cell, so mapping fails silently until analyze_mv_feasibility -retention is actually run.

Likely Tool / Clp Warning

UPF-909 error, with Tcl command status returned as 0, is the documented signal for a mapping failure detected by analyze_mv_feasibility.

Root Cause

The requested strategy's clamp value, sense, or supply combination has no corresponding entry among the library cells made available for mapping (via map_isolation_cell, map_level_shifter_cell, map_retention_cell, or use_interface_cell restrictions).

Debugging Sequence

1) Run analyze_mv_feasibility with the relevant flag(s) and capture UPF-909 occurrences. 2) Read the failure table's Clamp/ Sense/Failure Reason columns for each failing Element. 3) Crosscheck the library's actual cells (via report_mv_lib_cells) against the required clamp/sense combination. 4) Either widen the library-cell mapping (map_isolation_cell/map_retention_cell/ use_interface_cell) or change the strategy's clamp/sense to match an available cell. Any UPF-909 mapping failure is a hard blocker — the strategy cannot be realized in silicon with the current library, and must be resolved before proceeding past feasibility analysis.

Visual explanationLow-power context: How does analyze_mv_feasibility detect CLP-style violations when power management cells cannot be…
Low-power context: How does analyze_mv_feasibility detect CLP-style violations when power management cells cannot be…A three-step concept map summarizes the focus, core answer, and practical verification for How does analyze_mv_feasibility detect CLP-style violations when power management cells cannot be mapped to library cells?Question focusHow doesanalyze_mv_feasibilitydetect CLP-styleviolations when power…Core answeranalyze_mv_feasibility(with -isolation,-enable_level_shifter,retention, or…Verify in practiceanalyze_mv_feasibility-isolation-enable_level_shifter-retention level_shifte…Understand → explain the mechanism → verify the assumptions

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