The tools report power-state conflicts. How do you resolve them?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Short Answer
A power-state conflict means two parts of the power intent disagree: connected supplies carry different states, or a parent PST uses a voltage the child never defined, so the merge drops that state. Identify which case you have with report_pst -reconcile (ICC2) and report_system_pst (VCLP), then fix the UPF at its source instead of loosening checks until the message goes away.
Technical Explanation
- Connected-supply conflict: two supply nets or ports tied together carry different supply states; ICC2 reports UPF-159 at
commit_upf(ICC2). - Early data check:
mv.pst.conflict_supply_state(ICC2) is an error under the strict and normal configurations and tolerated under lenient, where the tool takes the later state. - Merge conflict: tools intersect parent and child PSTs into one system PST; a parent state whose voltage the child does not allow is dropped.
- Reconcile thresholds: with the upf_reconcile_boundary attribute set to reconcile_voltages,
set_variation -tolerance(ICC2) turns block voltages into ranges, so near-miss values such as 0.85 V versus 0.9 V still align. - VC LP view:
check_lp -stage upf(VCLP) reports PST_VOLTAGE_DROPPED for a parent state missing in a child; PST_VOLTAGE_UNUSED is the usually harmless reverse. - What breaks: a dropped state is a mode software can still enter, and no isolation, level-shifter or timing check ever covers it.
# [ICC2] icc2_shell
set_early_data_check_policy -checks mv.pst.conflict_supply_state -policy error
load_upf mychip.upf
commit_upf
report_early_data_checks
report_pst -reconcile
# [VC LP] vc_static_shell
read_upf mychip.upf
check_lp -stage upf
report_violations -app LP
report_system_pst -summaryWhat To Check
- Every connected pair of supply nets or ports carries one consistent set of states.
- Each top-level mode still exists in the merged system PST, or you can explain why it was dropped.
- Block PST voltages match the top, or a documented tolerance covers the difference.
- The conflict_supply_state policy is error for every signoff run, not lenient.
Command Checks & Actions
set_variation -supply {U_DSP/VDD} -tolerance {0.05}Allow a documented 0.05 V reconcile tolerance on one block supply
set_early_data_check_policy -checks mv.pst.conflict_supply_state -policy errorMake conflicting supply states stop commit_upf
commit_upfEvaluate the power intent and trigger the data checks
report_early_data_checksList failing data checks, their policy and fail count
report_pst -reconcileReport the voltage reconciliation settings after top and block variations are resolved
check_lp -stage upfStatic check of the UPF, including PST merge tags
report_system_pst -summaryCount potential versus actual system states before printing the full table
Healthy, Suspicious & Hard-stop Results
- Healthy (illustrative): report_early_data_checks shows no conflict_supply_state failures and report_system_pst lists all 4 MYCHIP modes.
- Suspicious (illustrative): report_system_pst -summary shows 3 actual system states where the mode spec defines 4.
- Hard stop:
commit_upfstops with UPF-159 under the error policy, or check_lp -stage upf reports PST_VOLTAGE_DROPPED on a mode the software uses.
Common Mistake
The Trap: Raising the reconcile tolerance until the block and top PSTs line up.
- The merge now accepts a voltage the block was never characterized for, and timing and level-shifter checks run on a mode the silicon cannot support.
What The Interviewer Is Testing
- Can you tell a connected-supply state conflict from a PST merge that drops states?
- Do you fix the intent at its source instead of widening tolerance or relaxing policy?
Follow-up Question & Model Response
"Why not set the data check policy to lenient so commit_upf finishes?"
Candidate Model Response: Lenient turns the check from error into tolerate, so the tool keeps the later of the two conflicting states and moves on. You have fixed nothing; you let the tool choose which intent wins. That choice then flows into isolation, level-shifter and retention decisions with no one reviewing it. Use lenient only for early exploration with incomplete UPF, and switch back to error before any signoff run.
Practical Example
Design Scenario: (illustrative) The MYCHIP top PST defines mode M3 with VDDdsp at 1.1 V. The PD_DSP block UPF from the IP team lists only 0.9 V and OFF. The merge drops M3, VC LP reports PST_VOLTAGE_DROPPED, and report_system_pst -summary shows 3 actual states instead of 4. The fix belongs in the block UPF: add the 1.1 V state with add_power_state -update after confirming the DSP was characterized at 1.1 V. Widening the tolerance to 0.2 V would also make it pass, but it would claim a 0.9 V block runs at 1.1 V.
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