What is power-state-table (PST) state explosion, and how does it constrain how many independently-switchable domains a real design can have?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Definition
PST state explosion is the exponential growth in the number of legal power states a design must define, verify, and implement as the number of independently-switchable power domains increases — because a Power State Table must, in principle, enumerate every combination of each domain's individual states (on, off, retention, and any supported voltage levels).
Mentor Explanation
If a design has N independently-switchable domains and each domain can be in k distinct states (say on/off/retention = 3 states), the theoretical maximum number of combined chip-level power states is k^N — with even a modest 5 domains at 3 states each, that's 243 combinations, most of which are never actually used or even legal (e.g., a domain that must always be on whenever a domain it feeds is on). In practice, a real PST doesn't enumerate all k^N combinations; it declares only the combinations that are legal and reachable, and it declares the rest as illegal states so that verification tools [UPF: like analyze_mv_feasibility] can flag any control-logic bug that would ever attempt to reach one of them. The engineering discipline here is deciding, early in the architecture phase, which domain combinations are actually needed by the product's use cases, rather than trying to support every mathematically possible combination.
Example
A chip with a CPU domain, a GPU domain, a DSP domain, an always-on domain, and a peripheral domain (5 domains) does not define states for every 3^5=243 combination — real product PSTs for chips like this typically define on the order of 10–20 named, verified states (e.g., "full performance," "GPU-idle," "deep standby," "always-on-only") corresponding to actual use cases, explicitly marking everything else illegal.
Why It Matters
Ignoring this scaling problem leads to two real failure modes: either the PST becomes so large it's impractical to fully verify (a state nobody thought to test turns out to be reachable and behaves incorrectly), or the design team over-restricts legal combinations late in the flow after realizing the full state space is unmanageable, forcing an architecture change. Recognizing PST state explosion early is why real designs cap the number of truly independent domains and instead group related blocks under coarser combined control where full independence isn't actually needed by any use case.
Command
create_pst chip_pst -supplies {VDD_CPU VDD_GPU VDD_DSP VDD_AON VDD_PERIPH}
add_pst_state FULL_PERF -pst chip_pst -state {ON ON ON ON ON}
add_pst_state GPU_IDLE -pst chip_pst -state {ON OFF ON ON ON}
add_pst_state DEEP_STANDBY -pst chip_pst -state {OFF OFF OFF ON OFF}
# only named, verified, use-case-driven states get declared -- not all 3^5 combinationsCommon Beginner Mistake
Assuming every mathematically possible combination of domain states must be explicitly supported and verified "just in case." The correct approach is the opposite — declare only the combinations the product actually uses as legal PST states, and explicitly mark everything else illegal, so verification effort and control-logic complexity scale with actual use cases rather than with the combinatorial explosion of domain count.
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