What does "save and restore" mean for a retention register?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Definition
"Save" is the operation of copying the current value of the main flip-flop into an internal backup latch just before the domain loses power; "restore" is the operation of copying that backup value back into the main flip-flop once power returns, so functional operation can resume from where it left off.
Mentor Explanation
Mechanically, a representative library cell (DRFFQX0) shows this as a next-state equation on the flip-flop: 'next_state : "(D) (NRESTORE !SAVE)"' — meaning the flop's next state follows the data input D only when NRESTORE and !SAVE conditions hold, and otherwise the save-latch path takes over. The backup save-latch itself is powered by a separate backup supply, VDDG, which can even run at a reduced voltage compared to the primary VDD — for example VDDG at 0.6V while primary VDD is 1.0V — since the save-latch only needs to hold a static value at very low leakage, not switch at speed. Architecturally, a retention register is a regular flip-flop (lowVt, primary voltage) plus a state-saving latch or 'balloon circuit' built from high-Vt transistors on a separate VDD_SLEEP supply.
Example
Just before shutdown, SAVE pulses and the save-latch (on VDDG) captures the flop's Q value; the domain then powers down; on waketime Active SAVE asserted Power removed Power restored RESTORE, then Active up, RESTORE pulses and that captured value is driven back into the main flop before normal clocking resumes.
Why It Matters
I probe this to see whether candidates understand that 'save' and 'restore' are two distinct, timed operations bracketing the poweroff window, not one continuous always-on connection.
Equation
next_state : "(D)(NRESTORE !SAVE)"Common Beginner Mistake
Believing the retention latch runs continuously in lockstep with the main flop; in reality it only needs to be updated at the save event and read out at the restore event, which is why it can use a much lowerpower, lower-voltage design.
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