What is a power domain?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Definition
A power domain is a grouping of design blocks that share one common power supply — blocks sharing one common power supply — and every power domain must have exactly one primary power net and one primary ground net.
Mentor Explanation
A beginner often pictures a power domain as just 'a physical area of the chip,' but it's really a logical/synthesis grouping first — a power domain is strictly a synthesis construct, not a netlist object. Think of it this way: the power domain is the design-intent concept, and its physical counterpart (a voltage area) only gets created later during physical implementation, in a strict one-to-one relationship.
Example
A worked chip example, MYCHIP, defines four power domains — PD_MYCHIP (the always-on top), PD_CPU, PD_COP (a shutdown domain with retention), and PD_DSP — each with its own supply net assignment.
Why It Matters
Defining power domains correctly up front is the foundation everything else in low-power design intent is built on — isolation, level shifting, retention, and power switching are all specified per power domain.
Command
create_power_domain PD1 -elements {U1 U2 U3} -scope Block1Common Beginner Mistake
A beginner mistake is assuming any grouping of RTL instances automatically becomes a power domain — in UPF, a power domain must be explicitly created (e.g., with create_power_domain) and every instance in the design must belong to one before the intent can be committed.
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