BeginnerQuestion 48 of 50Source: Synopsys IC Compiler II Implementation User Guide: Defining Voltage Areas; Synopsys IC Compiler II Multivoltage User Guide: Multiple Power Domains in a Single Voltage Area

What is a voltage area, and how is it different from a power domain?

From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide

By Tabish Iqbal · 9+ Years VLSI Physical Design Experience

Short Answer

A power domain is a logical group of instances in the UPF that share a primary supply. A voltage area is the physical region in the floorplan where those cells may be placed. Usually one domain maps to one voltage area, but several domains with the same primary supply can share one.

Left: UPF domain tree PD_MYCHIP with PD_CPU and PD_COP; right: floorplan with PD_MYCHIP in DEFAULT_VA, VA PD_CPU at {{0 0} {400 300}} and VA_COP at {{400 0} {700 300}}, arrows mapping each domain to its voltage area. — Technical Reference DiagramWhat is a voltage area, and how is it different from a power domain?

Technical Explanation

You create the power domain in UPF during synthesis and the voltage area in ICC2 during floorplanning.
create_voltage_area (ICC2) needs at least -power_domains; -region gives its rectangles or rectilinear shapes.
The rows inside carry the domain's primary supply, so a cell placed outside its area would sit on the wrong rail.
List several domains in one create_voltage_area (ICC2) and they must share one primary supply net, and you must name the area with -name.
Voltage areas can be rectilinear, disjoint, nested or overlapping; stacking order decides the effective shape.
Add shapes to an existing area later with create_voltage_area_shape (ICC2), one shape per command.
ICC2 tolerates a missing voltage area by default: a top-level domain without one falls into DEFAULT_VA, and check_mv_design (ICC2) only warns.

# [ICC2]  icc2_shell
create_voltage_area -power_domains PD_CPU -region {{0 0} {400 300}}
create_voltage_area -name VA_COP -power_domains {PD_COP PD_COP_DBG} -region {{400 0} {700 300}}
report_voltage_areas

Common Mistake

The Trap: Using "voltage area" and "power domain" as the same thing.

You then assume one area per domain always, and miss that domains with a shared primary supply can share one, or that one domain can span disjoint shapes.
Worse, you may never create the area at all. The domain's cells then sit in DEFAULT_VA on the top-level rail, and only a warning tells you.

Follow-up Question & Model Response

"Why must domains sharing a voltage area have the same primary supply?"

Candidate Model Response: The standard-cell rows in a voltage area are strapped to one primary supply. Every single-rail cell in those rows takes its power from that rail. A domain on a different primary supply would have its cells powered by the wrong net. Cells that need a second supply use dual-rail versions with a secondary PG pin. Level shifters are the usual example: they sit on one rail and take the other supply through that pin.

Practical Example

Design Scenario: (illustrative) In MYCHIP, PD_CPU gets its own area at {{0 0} {400 300}} µm. A small debug domain PD_COP_DBG shares PD_COP's switched supply VDD1p0_SW, so both go into one area, VA_COP, at {{400 0} {700 300}} µm, named with -name because it holds two domains. report_voltage_areas (ICC2) then lists PD_CPU and VA_COP with their domains and shapes.

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