Why inspect constant-driven pins and nets?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
Constants can be correct mode straps or evidence that logic, a clock, or an enable was optimised away unexpectedly.
Technical Explanation
A constant can be a deliberate mode strap or a clue that useful logic disappeared. The object name and active mode tell you which case you have.
What To Check
• Warning sign: A large register bank is constant because the wrong case or synthesis mode was used. • Inspect: Start with one named object in the report and trace it to the netlist, library, or SDC statement that created it. • Correct: Compare constants with mode intent and synthesis summaries; correct the producing netlist or constraint rather than reconnecting blindly.
Command Checks & Actions
• check_netlist: reports structural connectivity problems
• report_case_analysis: shows constants applied for the active mode
Run the commands in order. Each line answers a separate part of the check.Healthy, Suspicious & Hard-stop Results
• Expected: Constants can be correct mode straps or evidence that logic, a clock, or an enable was optimised away unexpectedly. • Investigate: A large register bank is constant because the wrong case or synthesis mode was used. • Stop before floorplanning when required logic or timing coverage is missing or unexplained. Compare constants with mode intent and synthesis summaries; correct the producing netlist or constraint rather than reconnecting blindly.
Common Mistake
Do not assume the check passed just because ICC2 continued: A large register bank is constant because the wrong case or synthesis mode was used. Fix or narrowly justify the named objects, then rerun the same command.
What The Interviewer Is Testing
Be ready to explain why this matters before floorplanning: A large register bank is constant because the wrong case or synthesis mode was used.
Practical Example
Symptom: A large register bank is constant because the wrong case or synthesis mode was used. Corrective path: Compare constants with mode intent and synthesis summaries; correct the producing netlist or constraint rather than reconnecting blindly.
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