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What does a "don't-touch subtree" constraint actually protect during CTS, and when would you use it?

From PDVerse PnR Interview Handbook · pdVerse Mentor Guide

Short Answer

The don't-touch subtree constraint selectively preserves a portion of the clock tree at a particular clock pin -- useful, for example, at a mux between two clocks feeding different downstream paths, where you want CTS free to optimize everywhere except that specific already-correct structure. It's a scoped protection, not a whole-tree freeze.

Technical Reference DiagramWhat does a "don't-touch subtree" constraint actually protect during CTS, and when would you use it?
What does a "don't-touch subtree" constraint actually protect during CTS, and when would you use it?, illustrating the physical design concept.

Technical Explanation

  • The don't-touch subtree constraint selectively preserves a portion of the clock tree at a particular clock pin, not the whole tree.
  • A concrete use case: at a mux between two clocks (e.g. CLK1/CLK2) feeding different downstream paths, you may want CTS free to optimize everywhere else while leaving that specific mux structure exactly as-is.
  • This is scoped protection, distinct from a global dont_touch on the whole clock network -- you're protecting one already-correct structure, not opting the entire tree out of optimization.
  • No verified dedicated command syntax was found for a "don't-touch subtree" scoped to one clock pin -- the likely mechanism is a set_dont_touch or mark_clock_trees -dont_touch variant, but the exact flag should be verified against the ICC2 Implementation User Guide rather than assumed.

Common Mistake

The Trap: Reaching for a full dont_touch on the whole clock network when only one specific subtree (e.g. a clock mux structure) actually needs protecting -- that over-constrains CTS everywhere else unnecessarily.

Follow-up Question & Model Response

"Why would a clock mux specifically be a common place to need this kind of scoped protection?"

Candidate Model Response: A clock mux is exactly where two independently-timed clock paths converge into one structure feeding different downstream domains -- getting that convergence point right by hand and then protecting it from CTS's automated optimization is more reliable than trusting the algorithm to preserve a correctness property it doesn't know is special.

Practical Example

Debug Scenario: A design has a manually verified clock-mux structure feeding two downstream domains. A don't-touch subtree constraint at that mux's output pin protects it while CTS still freely optimizes the rest of the tree upstream and downstream.

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