ExpertQuestion 147 of 161Source: Synopsys ICC2 Implementation User Guide: IC Validator In-Design (Automatically Fixing Isolated Vias)

How does isolated-via fixing choose a fix, and when can't it fix everything?

From PDVerse PnR Interview Handbook · pdVerse Mentor Guide

Short Answer

signoff_fix_isolated_via (ICC2) looks for a neighbour within the range you set per via layer, and if none exists it adds a fixing via using dummy fill as the landing. It tries three methods in a fixed order: a via between an existing non-wide net shape and fill, then a line-end extension plus via, then a via between a wide metal shape and fill. On very congested or very sparse blocks it may not fix them all, and by default it also skips clock and PG nets.

Technical Reference DiagramHow does isolated-via fixing choose a fix, and when can't it fix everything?
Three layout panels around one isolated via: a new via between an existing thin net shape and a fill shape, a line-end extension with a via to fill, and a via between a wide metal shape and fill, ranked by priority, with a congested panel where no fill shape fits inside the search range.

Technical Explanation

  • An isolated via has no neighbouring via within the distance the technology requires. You set that distance per via layer in signoff.fix_isolated_via.isolated_via_max_range (ICC2), using mask names such as via1 and microns. It is the one required option.
  • Before fixing, the command inserts track-based dummy fill around each isolated via, ignoring existing fill. If track fill is already in, -update_track_fill true (ICC2) with -track_fill_runset_include_file (ICC2) pointing at track_fill_params.rh (ICC2) reuses those shapes.
  • Fix priority is fixed: first a via from an existing non-wide net shape to a fill shape, then extending a non-wide line end and dropping a via to fill, and last a via from a wide metal shape to fill. Each candidate honours routing rules including double patterning and nondefault spacing.
  • Unused dummy fill is removed afterwards, so the net change is only the fixing vias and the shapes they need.
  • The avoid-net-types app option of the isolated via fixer defaults to clock and pg. Isolated vias on clock and PG nets are left alone unless you change it, so they will still appear in the report.
  • Congestion is the common failure: with no free track inside the range there is nowhere to put fill or an extension without a spacing violation. The guide also names very sparse blocks as a case where not every via gets fixed.
  • The block is not saved by default. Run save_block (ICC2) or use -save_design true (ICC2), then read the summary of isolated vias per layer before and after, and signoff_fix_isolated_via.err (ICC2) in the error browser.

What To Check

  • Isolated vias per via layer before and after, from the summary report.
  • Remaining isolated vias on clock and PG nets, which are skipped by default.
  • Local congestion around each via that could not be fixed.
  • New DRC violations near fixing vias after the run.

Command Checks & Actions

ICC2 (icc2_shell)set_app_options -name signoff.fix_isolated_via.isolated_via_max_range -value {{via1 0.5} {via2 0.5}}

Required: neighbour search distance per via layer in microns (values illustrative).

ICC2 (icc2_shell)signoff_fix_isolated_via -check_only true

Counts isolated vias per layer without changing the block.

ICC2 (icc2_shell)signoff_fix_isolated_via -update_track_fill true -track_fill_runset_include_file init_fill/track_fill_params.rh

Fixes using the existing track fill instead of inserting new dummy fill.

ICC2 (icc2_shell)signoff_fix_isolated_via -save_design true -error_data iso_fix.err

Fixes, saves the block, and names the error data file.

ICC2 (icc2_shell)signoff_check_drc -auto_eco true

Incremental signoff DRC on the areas the fixing vias changed.

Healthy, Suspicious & Hard-stop Results

  • Healthy (illustrative): Isolated vias on via2 drop from 3,420 to 12, the 12 all sit in one congested channel, and incremental DRC is clean.
  • Suspicious (illustrative): Hundreds remain on clock nets because clock and pg are still the default avoid list, and nobody has decided whether that is acceptable.
  • Hard stop: Fixing vias that create DRC violations, or a large remaining count with no plan for manual repair.

Common Mistake

The Trap: Reading the post-fix report, seeing 600 isolated vias left, and rerunning the command three times. The remainder are clock-net vias excluded by the default avoid list plus vias in a congested macro channel, and repeating the run changes nothing.

What The Interviewer Is Testing

  • Can the candidate recite the three-step fix priority and explain why a new via on an existing thin shape comes first?
  • Awareness of the clock and PG default exclusion.
  • Knowledge that the command does not save the block by default.

Follow-up Question & Model Response

"Why is extending a line end ranked below a direct via to fill?"

Candidate Model Response: A direct via to fill adds one cut and leaves the existing wire untouched. A line-end extension changes the net's geometry, adds a little capacitance, and has to satisfy end-of-line spacing to its neighbours, so it is more likely to disturb something. A via from a wide metal shape comes last, probably because wide-metal via rules are stricter. The tool picks the least disruptive option that satisfies the rules.

Practical Example

Tapeout Scenario: A block has 3,420 isolated vias on via2 (illustrative) with a 0.5 um range. The fix run clears 3,390: 2,600 with direct vias to fill, 700 with line-end extensions and 90 from wide metal. Of the 30 left, 18 are on clock nets excluded by default and 12 sit in a 3 um channel between two macros with every track used. The team adds clock to the fix list after a timing check and fixes the channel by hand.

PnR Flow Mentor Guide

Read the complete 8-chapter PnR Flow Mentor Guide free on the web — library setup through placement, clock tree synthesis, routing, chip finishing, hierarchical implementation, and ECO, all the way to stream-out.

PnR Flow Physical Design Mentor Guide — eight chaptersPnR Flow Mentor GuideEight chapters, library setup through to stream-out. →