How do you find missing vias and unconnected PG pins before IR analysis?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
A missing via is a place where two PG shapes on different layers overlap but have no via in the overlap, and an unconnected pin shape is a PG pin that has no continuous physical path to an ideal voltage source. RedHawk Fusion finds both: set the options with set_missing_via_check_options (ICC2), save the block, then run analyze_rail -voltage_drop static -check_missing_via -nets {VDD VSS} (ICC2). The command reference says -check_missing_via requires -voltage_drop. Do it after the power structure is built and before place_opt (ICC2).
Technical Explanation
- The tool reports overlaps without vias as potential missing via errors. Some overlaps cannot hold a via at all, so each one still needs a look.
- Unconnected pin shapes are pin shapes that are not contiguously and physically connected to an ideal voltage source, which means to a tap. A macro whose PG pins never got straps shows up here.
- Running it early pays off: right after the PG grid is built nothing is in the way, while after routing the same fix can mean ripping up signal wires.
- The documented sequence: set options,
save_block(ICC2), run the check, examine the error files, insert PG vias. The check can run in a separate run or during voltage drop analysis, but the command reference says-check_missing_via(ICC2) requires-voltage_drop(ICC2); the guide's check-only example passes it with no type. - Useful options:
-exclude_stack_vialeaves stacked vias out (by default they are included),-check_valid_viasreports whether an overlap can hold a valid via model,-exclude_cellor-exclude_regionsnarrow the area, and-thresholdsets a voltage filter that only applies when the check runs with voltage drop analysis (-1 disables it). - With
-voltage_dropthe report carries voltage values for each missing via. RedHawk-SC Fusion requires-voltage_dropwith this check, and its display of missing via results does not honour the IR threshold. - Error data goes to one
missing_via.<net>.errfile per supply net in the working directory; save the block before you quit to keep it.fix_pg_missing_vias(ICC2) inserts PG vias for the reported error objects and marks them fixed in the error browser.
What To Check
- Missing via count per supply net, and whether they line up along one strap or one layer pair.
- Unconnected pin shapes, especially macro and power-switch PG pins.
- Whether stacked vias were excluded on purpose.
- Overlaps that
-check_valid_viassays cannot hold a via, reviewed by hand. - A clean rerun after fixing, before the first IR run you intend to trust.
Command Checks & Actions
set_missing_via_check_options -exclude_stack_via -threshold -1Sets up the check, excludes stacked vias and disables voltage filtering.
report_missing_via_check_optionsShows the option settings the next check will use.
save_blockSaves the block before the check, as the documented flow requires.
analyze_rail -voltage_drop static -check_missing_via -nets {VDD VSS}Runs the missing via and unconnected pin check together with static voltage drop.
report_rail_result -type missing_vias -supply_nets {VDD VSS} rpt.missing_viasWrites the missing via results to a text file.
fix_pg_missing_vias -error_data $errdm $errsInserts PG vias for the error objects opened from the error data file.
Healthy, Suspicious & Hard-stop Results
- Healthy (illustrative): Zero missing vias and zero unconnected pins on VDD and VSS after the fix pass, with a handful of reviewed overlaps that cannot hold a via.
- Suspicious (illustrative): A few hundred missing vias all along one layer pair in one region, which usually means an offset strap or a wrong via rule in the PG script.
- Hard stop: Unconnected PG pins on a macro, power switch or standard-cell rows, or missing vias on the path feeding a known IR hotspot.
Common Mistake
The Trap: Running the first missing via check after route_opt (ICC2). It finds 1,200 missing M2-M3 vias under a macro channel caused by a PG script offset, and every fix location now has signal routes on top. Adding the vias means rip-up and reroute in the most congested part of the block, followed by new DRC and timing runs, which costs days that a check before placement would have saved.
What The Interviewer Is Testing
- Knowing the two error types the check reports and what each means physically.
- Running the check at the right stage, and the RedHawk-SC Fusion requirement to pair it with
-voltage_drop. - Closing the loop with a fix and a rerun, not only a report.
Follow-up Question & Model Response
"Why does the guide call an overlap without a via a potential missing via?"
Candidate Model Response: Two PG shapes of the same net that overlap on adjacent layers normally should be connected, but not every overlap can hold a via. The overlap might be narrower than the smallest legal via, or a via there might break a spacing or double-patterning rule. -check_valid_vias reports whether the overlap can accommodate a valid via model, which separates real misses from impossible ones. The impossible ones are reviewed and, if the connection matters, fixed by changing the strap geometry.
Practical Example
Tapeout Scenario: (illustrative) After PG creation the check reports 380 potential missing vias on VDD and 372 on VSS. -check_valid_vias shows that 40 VDD and 38 VSS overlaps cannot hold a valid via. fix_pg_missing_vias (ICC2) inserts 340 + 334 = 674 vias. The rerun reports only the 78 impossible overlaps, which are reviewed and accepted. The first static IR run afterwards shows a worst drop of 31 mV instead of the 52 mV a trial run showed before the fix.
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