What are taps in rail analysis, and why must they touch metal?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
Taps are ideal voltage sources placed on the PG network to stand in for the pads, bumps or block pins that feed it; every drop in the rail analysis is measured from them. They are virtual models, not part of the design, so a tap only does something if it touches a PG shape on its layer. A tap with no conductive path to the supply network has no effect on the analysis, and create_taps (ICC2) warns about it with RAIL-305.
Technical Explanation
- Taps set where current enters the grid at full voltage; misplace them and the whole map shifts.
-top_pgtreats the top-level PG pins as taps and is meant for blocks without physical pad or bump information.-supply_netnames the net explicitly; without it the net comes from the object the tap was defined on. The guide pairs it with-top_pg; the command reference says it is ignored there.-layerwith-pointcreates a tap at absolute coordinates, and here-supply_netis required. If there is no supply net shape, pin or via at that spot, the tap has no conductive path and has no effect on the analysis.-of_objectsplaces taps on the PG pins of pad cells or other instances, for top-level runs where pad cells are placed.-importreads a tap file with lines of net name, layer number and x y in microns.- Simple package RLC models come in through
rail.pad_files(ICC2), which requires enabling the RedHawk signoff licence key withrail.allow_redhawk_license_checkout(ICC2). If no pad files are given, you must create taps. - By default the command checks each tap location, warns with RAIL-305 if it touches no layout shape, and records the result in
is_valid_location, which later voltage drop and minimum path resistance runs update;-nocheckleaves it unknown. The guide and command reference differ on whether an invalid tap is kept or dropped, so confirm the tap count per net after creation. - For an invalid tap created with
-pointand-layer,-snap_distancesearches nearby shapes on the same layer and reinserts the tap at the corner of the closest valid shape.remove_taps(ICC2) deletes taps you no longer want.
What To Check
- RAIL-305 warnings in the log: the count should be zero.
- Taps with
is_valid_locationfalse after creation and after the first voltage drop run. - Tap count and positions per net against the bump or pad plan.
- That every supply net you analyse has at least one valid tap.
- Any taps created with
-nocheck, and the reason.
Command Checks & Actions
create_taps -top_pgCreates taps on all top-level supply pins, for a block without pad or bump data.
create_taps -supply_net VDD -layer 3 -point {100.0 200.0}Creates a tap at absolute coordinates; warns with RAIL-305 if it touches no polygon.
create_taps -import tap_fileReads tap locations, layers and nets from an ASCII file.
get_taps -filter is_valid_location==falseLists taps that failed the location check.
create_taps -supply_net VDD -point {50 50} -layer M1 -snap_distance 100Snaps a tap to the nearest valid shape corner within 100 um; -supply_net is required with -point and -layer.
remove_taps [get_taps -filter type==top_pg]Removes the top-level pin taps before switching to a bump-based tap file.
Healthy, Suspicious & Hard-stop Results
- Healthy (illustrative): Zero RAIL-305 warnings, every tap valid, and 48 VDD plus 48 VSS taps matching 48 plus 48 bumps.
- Suspicious (illustrative): Tap count differs from the bump map, for example 44 of 48, or taps created with
-nocheckwhose validity is unknown. - Hard stop: RAIL-305 on taps that stand for real bumps, a supply net with no valid tap, or signoff IR run with
-top_pgon a design whose bump plan exists.
Common Mistake
The Trap: Reusing a tap file from an earlier floorplan after the bump plan moved. A quarter of the taps land in empty space, the RAIL-305 warnings scroll past in a long log, and the grid is fed from fewer points than the real chip has. The reported worst drop doubles and the team adds straps that were never needed, taking tracks from a congested block.
What The Interviewer Is Testing
- Understanding taps as the ideal sources that define where the analysis starts.
- Knowing RAIL-305 and the
is_valid_locationattribute, and acting on them. - Choosing the right creation method for a block run versus a top-level run.
Follow-up Question & Model Response
"When is -top_pg the right choice, and when is it wrong?"
Candidate Model Response: It is right for a block-level run where the only known supply entry points are the block's top-level PG pins, which is the case it is documented for. It is wrong once real pad or bump data exists, because current then enters at pin shapes that may not match where the package actually feeds the die. At the top level with pad cells placed, use -of_objects on the pad cells; with a bump plan, import a tap file or use pad files.
Practical Example
Tapeout Scenario: (illustrative) A block has 48 VDD and 48 VSS taps imported from a file. After a floorplan change, 6 VDD taps report RAIL-305 because the pins moved 20 um, leaving 42 valid VDD taps. The worst VDD drop reads 41 mV against a 36 mV budget. Recreating the 6 taps with -snap_distance 25 puts them on the moved pins, all 48 report is_valid_location true, and the rerun shows 29 mV, inside budget with no grid change.
PnR Flow Mentor Guide
Master the Physical Design Implementation Flow
Read the complete 8-chapter PnR Flow Mentor Guide free on the web — library setup through placement, clock tree synthesis, routing, chip finishing, hierarchical implementation, and ECO, all the way to stream-out.

Continue practising