BeginnerQuestion 109 of 127Source: Synopsys ICC2 Implementation User Guide: Routing

What is a redundant (double) via, and why insert it?

From PDVerse PnR Interview Handbook · pdVerse Mentor Guide

Short Answer

A redundant via adds a second cut next to an existing single cut, so the connection survives if one cut fails. The two cuts also share current, which lowers via resistance and improves electromigration margin. Success is measured by the redundant via conversion rate, the percentage of single vias that were converted.

Technical Reference DiagramWhat is a redundant (double) via, and why insert it?
A single-cut via beside a double-cut via, with a ledger showing resistance roughly halving and the extra metal space the second cut needs.

Technical Explanation

  • Via formation is one of the bigger yield risks at deep submicron nodes. With two cuts in parallel, one bad cut no longer opens the net.
  • Two cuts in parallel also roughly halve the via resistance and spread current density across both cuts, so electromigration margin improves too.
  • The second cut needs room. The via enclosure grows, which can collide with neighbouring wires, so insertion is always a trade between conversion rate and DRC convergence.
  • ICC2 uses a via mapping table that says which single via can be replaced by which multi-cut via. add_redundant_vias -list_only true shows the table without changing anything.
  • The normal starting point is postroute insertion with add_redundant_vias after detail routing. Stronger modes, which reserve space during routing, are only used if postroute insertion falls short.
  • The rate from report_design -routing differs from the one printed during insertion or by check_routes. report_design includes PG and signal vias, while Zroute reports a signal-only rate based on the mapping table.

What To Check

  • The total optimized via conversion rate printed after add_redundant_vias.
  • The per-layer conversion rate, looking for one via layer far below the others.
  • check_routes after insertion, to confirm no new DRCs.
  • Which rate you are quoting: signal-only or the report_design number that includes PG.

Command Checks & Actions

ICC2add_redundant_vias -list_only true

Prints the via mapping table without inserting anything, so you can check which replacements are allowed.

ICC2add_redundant_vias

Converts single vias to multi-cut vias after detail routing and reports the conversion rate.

ICC2report_design -routing

Reports via statistics including the double via conversion rate per layer and for the block.

ICC2check_routes

Confirms that insertion did not introduce DRCs.

Healthy, Suspicious & Hard-stop Results

  • Healthy (illustrative): Postroute insertion reaches about 80% or more with no new DRCs after check_routes.
  • Suspicious (illustrative): One via layer converting at half the rate of the others, which usually means dense routing or a missing mapping entry.
  • Hard stop: New DRCs left after insertion, or a conversion rate quoted without saying whether PG vias are included.

Common Mistake

The Trap: Comparing a signal-only conversion rate from the insertion log with a report_design rate from a previous run and concluding the rate dropped. The two numbers count different vias. The engineer spends a day debugging a regression that does not exist.

What The Interviewer Is Testing

  • Whether you know the three benefits: yield, resistance and electromigration.
  • Do you know the trade-off against DRC convergence?
  • A strong answer shows you can read the conversion rate report correctly.

Follow-up Question & Model Response

"Why not insert redundant vias during detail routing from the start on every design?"

Candidate Model Response: Concurrent insertion does exist, but reserving space for second cuts makes routing slower and makes DRC convergence harder, especially on congested blocks. The documented approach is to start with postroute insertion and only move to concurrent soft-rule insertion if postroute reaches around 80% and you need more. Near-100% insertion is reserved for blocks that truly need it and have reached about 90% already. Most blocks never need to go past the first step.

Practical Example

Tapeout Scenario: After detail routing, a block has 1.45 million signal vias (illustrative). add_redundant_vias reports a total optimized via conversion rate of 84%, with VIA1 at 61% because M1 and M2 are dense around the cells. check_routes shows zero new DRCs. The team accepts 84% for this block. A second block at 72% gets a look at its VIA1 mapping entries, which turn out to be missing the rotated double-cut option.

PnR Flow Mentor Guide

Read the complete 8-chapter PnR Flow Mentor Guide free on the web — library setup through placement, clock tree synthesis, routing, chip finishing, hierarchical implementation, and ECO, all the way to stream-out.

PnR Flow Physical Design Mentor Guide — eight chaptersPnR Flow Mentor GuideEight chapters, library setup through to stream-out. →