What is Magnet Placement, and how is it used during physical implementation?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
Magnet placement is exactly what it sounds like: you designate a fixed object — an I/O port, a macro, or even one macro pin — as a "magnet," and the placer applies an attractive pull to every standard cell directly wired to it. Without this, interface registers connected to a fixed off-block port can end up scattered randomly across the core by unconstrained global placement, which then makes closing the interface's input-delay timing painful.
Technical Explanation
- Magnet placement is exactly what it sounds like: you designate a fixed object — an I/O port, a macro, or even one macro pin — as a "magnet," and the placer applies an attractive pull to every standard cell directly wired to it.
- Without this, interface registers connected to a fixed off-block port can end up scattered randomly across the core by unconstrained global placement, which then makes closing the interface's input-delay timing painful.
- The pull typically has a distance cap — e.g., "keep all direct receiver flops within 50 µm of this I/O pad" — so cells land close without collapsing into an unrealistic pile.
- The same trick pulls SRAM read-data registers close to the SRAM's Q-pins for the mirror-image reason: it eliminates long routing delay on the memory-access critical path, and it works best when applied before general standard-cell placement, not after.
Common Mistake
The Trap: Applying magnet placement with an overly tight distance constraint (e.g. 5 um), which creates an extreme placement density hotspot right in front of the I/O pin that fails legalization.
Follow-up Question & Model Response
"How does magnet placement differ from a fixed placement bound?"
Candidate Model Response: A placement bound creates a rigid geometric box that strictly confines specified instances. Magnet placement applies an attractive directional force without rigid geometric boundaries.
Practical Example
Executing Magnet Placement:
# Synopsys ICC2: Magnet placement pulling interface registers toward DDR ports
create_placement -magnet [get_ports ddr_data[*]] -cells [get_cells u_ddr_phy/rx_reg*]
# Cadence Innovus magnet placement
magnetMove [get_ports ddr_data[*]] -cells [get_cells u_ddr_phy/rx_reg*]Physical Design & Planning Handbook
Master ASIC Physical Design Planning & Floorplanning
Dive into 14 comprehensive chapters covering netlist sanity, FinFET grids, macro placement, power grids, CTS, and timing budgeting.
Continue practising