What is timing-exception precedence, and why can a broad false path silently swallow an intended multicycle exception?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Explanation
When multiple timing exceptions could apply to the same path, the tool resolves them by precedence rather than combining them — and false path exceptions take precedence over multicycle exceptions. This means a broad false path declaration can completely exclude a path that an engineer separately intended to only relax via a multicycle exception.
Timing-path Walkthrough
In the worked example, the intent was set_multicycle_path 2 -setup -from clkA_reg -to clkB_reg, relaxing (but still checking) that path. But an earlier, broader set_false_path from [get_clocks clkX] happened to match the same path and, because false path beats multicycle in precedence, it won outright — excluding the path from analysis entirely instead of merely relaxing its setup requirement.
Command
set_multicycle_path 2 -setup -from clkA_reg -to clkB_reg
set_false_path -from [get_clocks clkA]Switch-by-switch
-from / -to: scope an exception to specific startpoint/endpoint clocks or pins; a broad from [get_clocks clkA] can match more paths than intended, including ones meant only
for a multicycle relaxation.Expected Report Behavior
The intended multicycle path disappears from report_timing entirely (excluded as false) rather than showing up with a relaxed, multi-cycle required time.
Mentor Note — Common Mistake
Writing an overly broad false path constraint (matching by clock rather than by specific pin/instance) that unintentionally overlaps with a path meant only for a multicycle exception.
How To Debug
If a path expected to show a relaxed multicycle slack is missing from report_timing, check for a broader false path exception on the same clocks/pins that may be taking precedence and excluding it outright.
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