What does physical implementation and signoff look like for a multivoltage design (secondary PG placement constraints, check_mv_design, Early Data Check policies)?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Technical Explanation
Physical signoff for an MV design centers on three pieces: secondary PG placement constraints, which govern where power-management cells (level shifters, isolation cells, enable level shifters, repeaters, retention registers, tie cells) are allowed to sit relative to secondary power/ground straps; check_mv_design, the complete power-intent and PG-connectivity/ electrical-correctness check that can be restricted with isolation or -pg_pin; and the Early Data Check Manager, which lets you set a global severity policy (strict, lenient, or normal) or a per-check policy (error, tolerate, or repair) and then report results with report_early_data_checks.
Architecture-level Reasoning
Secondary PG placement constraints exist because power-management cells specifically need reliable, close access to secondary straps to avoid IR-drop and connectivity problems that a general standard-cell placement flow wouldn't otherwise guarantee; check_mv_design and the Early Data Check Manager exist to give a structured, severity-graded way to catch and either flag, tolerate, or auto-repair the wide variety of MV-specific issues (missing connections, conflicting strategies, invalid elements) before tapeout.
Step-by-step Walkthrough
1) Define secondary PG placement constraints: create_secondary_pg_placement_constraints -supply -layers -region -margin -voltage_areas -lib_cell_types {level_shifters| isolation_cells|enable_level_shifters|repeaters| retention_registers|tie_cells} [-exclude_supply][-force], or derive them automatically with derive_secondary_pg_placement_constraints -layers -margin -apply. 2) Validate with check_secondary_pg_placement_constraints, which checks conflicts between the constraints and the UPF/netlist, and between user-specified vs strap-availability and user vs toolderived constraints (-blocks for hierarchical designs). 3) Run check_mv_design (optionally scoped with -isolation or -pg_pin) for the complete electrical-correctness and PG-connectivity check. 4) Configure the Early Data Check Manager: set_early_data_check_policy -policy strict|lenient|normal (global) or -policy error|tolerate|repair -checks (per-check, severity decreasing error > tolerate > repair) — note you cannot move a check to a MORE strict policy without reset_upf first, except for mv.va.missing_voltage_area. 5) Run the flow and inspect results with report_early_data_checks [-checks], where verbose output adds the warning/error text and an action description; use get_early_data_check_records, write_early_data_check_config, and remove_early_data_check_records as needed to manage the check state.
Command
create_secondary_pg_placement_constraints -supply -layers region -margin -voltage_areas -lib_cell_types {level_shifters
isolation_cells enable_level_shifters repeaters retention_registers
tie_cells}
check_secondary_pg_placement_constraints -blocks {block_list}
check_mv_design -isolation
set_early_data_check_policy -policy strict
report_early_data_checks -checksSwitch-by-switch
-supply/-layers/-region/-margin/-voltage_areas
(create_secondary_pg_placement_constraints): define which supply,
which metal layers, what region/margin, and which voltage areas
the constraint covers. -lib_cell_types: restricts the constraint
to specific power-management cell categories. -exclude_supply/force: exclusion and override controls. -blocks
(check_secondary_pg_placement_constraints): scopes the check to
specific hierarchical blocks. -isolation / -pg_pin
(check_mv_design): restricts the check to isolation-related rules
or PG-pin connectivity rules respectively. -policy strict|
lenient|normal (set_early_data_check_policy, global): strict =
highest severity overall, lenient = lowest, normal = recommended
default that checks/reports without changing the default flow or
QoR. -policy error|tolerate|repair checks (per-check): error is most severe, tolerate is middle,
repair is least (auto-fixes and continues).Expected Result
Power-management cells correctly placed relative to secondary PG straps with no unresolved placement conflicts, a clean check_mv_design run with no unresolved electrical/connectivity errors, and an Early Data Check report showing all relevant checks passing at the configured severity policy.
Possible Implementation Error
Attempting to tighten a per-check policy from repair back up to error mid-flow without first calling reset_upf (other than the one documented exception, mv.va.missing_voltage_area), expecting the stricter policy to simply take effect.
Likely Tool / Clp Warning
The Early Data Check Manager explicitly disallows moving a check to a MORE strict policy without reset_upf first (except mv.va.missing_voltage_area); attempting it is a documented usage restriction rather than a silently-ignored setting.
Root Cause
Once a check has run and possibly repaired or tolerated an issue under a looser policy, the design state already reflects that looser handling — the tool requires a reset_upf to return to a clean state before it will re-apply a stricter policy consistently.
Debugging Sequence
1) If a stricter per-check policy needs to be applied, confirm whether the check is mv.va.missing_voltage_area (the one exception) or requires reset_upf first. 2) Run check_secondary_pg_placement_constraints and check_mv_design after any PG placement constraint changes to confirm no new conflicts were introduced. 3) Use report_early_data_checks checks in verbose mode to read the specific warning/error text and recommended action for any failing check. 4) Use get_early_data_check_records to pull structured records for scripted triage if needed. Secondary PG placement conflicts, unresolved check_mv_design errors, and any Early Data Check failures at the configured policy severity are all hard blockers that must be cleared before the multivoltage design can be signed off for physical implementation.
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