What is the difference between dynamic power and leakage (static) power?
From PDVerse Low-Power Physical Design Mentor Guide · pdVerse Mentor Guide
Definition
Dynamic power is the power consumed only when circuits are actively switching (charging/ discharging capacitance, and momentary short-circuit current), while leakage (static) power is the power a circuit consumes even when it is not switching at all, simply because transistors are never perfect off-switches.
Mentor Explanation
The important point is that total power is just the sum of the two. A beginner often assumes that a chip sitting idle draws no power — but leakage current flows through supposedly 'off' transistors all the time, which is why standby power is its own signoff concern, separate from active/ functional power.
Example
A flip-flop that is clocked but never changes state still burns leakage power every cycle, even though it contributes almost nothing to dynamic power in that state — this is exactly the situation clock gating is designed to exploit later in the flow.
Why It Matters
Distinguishing the two matters because the techniques to reduce them are different: dynamic power responds to activity-reduction techniques (clock gating, operand isolation), while static power responds to device-level techniques (multi-Vt, power gating, back bias).
Equation
Total power = Dynamic power + Static (leakage) powerCommon Beginner Mistake
Beginners sometimes lump all power into one number and then apply the wrong fix — for example, trying to clock-gate a purely leakage-dominated standby mode won't help, since gating a clock does nothing for the leakage current still flowing through the gate.
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