How do clock skew, latency, jitter, and uncertainty actually differ, and how do they combine?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
Skew is a spatial difference: the gap in clock arrival time at two different leaf registers at the same moment. Jitter is a temporal difference: how much a clock edge's timing varies at one single point across cycles. Latency is how long the clock takes to arrive at all, split into source latency (before the clock enters the network) and network latency (through the distribution tree to the sink). Uncertainty is the combination CTS actually has to budget for -- skew plus jitter together -- because both eat into the same setup/hold margin even though they come from different physical causes.
Technical Explanation
- Skew is spatial: delta = t2 - t1, the difference between two leaf registers' clock propagation delay along two different paths, measured at the same instant.
- Jitter is temporal: the variation of the clock period at a given point over time, not a comparison between two locations.
- Latency is how long the clock takes to arrive at all: source latency (true origin to network entry) plus network latency (network entry to the sink).
- Uncertainty is skew plus jitter combined -- what CTS has to bound, because both eat into the same setup/hold margin regardless of cause.
- Proper operation requires delta <= t1 (combinational logic delay between the two registers), which lower-bounds the clock period: T >= t1 - delta.
- Root causes are systematic (routing non-uniformity, repeatable) or random (device/process/temperature/supply variation, not repeatable, and increasingly visible within a single die as on-chip variation).
report_clock_timing -type skewandreport_clock_timing -type latencyare the actual ICC2 commands that report the skew and latency numbers these definitions describe -- not just conceptual terms.
Formula Or Decision Rule
Skew: delta = t2 - t1 (spatial, two locations, one moment). Proper-operation bound: delta <= t1, so T >= t1 - delta. Uncertainty (what CTS budgets): skew + jitter. Latency = source latency + network latency.
Common Mistake
The Trap: Using "skew" and "uncertainty" interchangeably, or treating jitter as just another word for skew -- they're measured on different axes (space vs. time) and only uncertainty is the combined number CTS actually has to close against.
What The Interviewer Is Testing
Whether you can precisely separate these four terms instead of using them as loosely interchangeable synonyms for "clock timing is off."
Practical Example
Worked Example: Two leaf registers with combinational logic delay t1 = 500ps between them show clock arrival times of 1200ps and 1150ps respectively -- skew delta = 50ps, well under t1, so the path is safe on the skew axis alone. If the clock source itself also has 30ps of jitter at that same point, the CTS-relevant uncertainty for this path is 50ps + 30ps = 80ps, not just the 50ps skew number by itself.
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