How do manufacturing, placement, routing, and FinFET grids differ?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
These grids constrain different things. The manufacturing grid quantizes allowed geometry coordinates; placement sites constrain legal cell placement; routing tracks suggest wire centerlines; the FinFET placement grid constrains relevant cell and boundary alignment.
Technical Explanation
A manufacturing grid is often finer than a placement-site grid. Being on that fine grid only means a coordinate is representable at the allowed geometric step; it does not make the coordinate a legal cell origin. Similarly, being on a legal placement site does not prove every pin has an accessible routing track or that a macro boundary satisfies all device-related alignment requirements. Treat each grid as a rule with its own origin or offset, spacing, applicable object types, and orientation conventions. Check the technology and library definitions together. If multiple grids constrain an object, the object must satisfy their combined requirements. It is unsafe to replace all of them with one remembered pitch value. When an import creates off-grid geometry, identify which grid is violated before snapping anything. Rounding can change spacing, enclosure, macro alignment, or port access. A small coordinate edit may remove one violation while creating another. Preserve intended physical dimensions and use the tool's appropriate legalization and grid-checking flow, then inspect the affected geometry.
Common Mistake
Saying a point is simply “on-grid” without naming the grid and the object rule being checked.
Follow-up Question & Model Response
Can a routing pin be off a track center and still be accessible? Yes, if legal overlap and via/access geometry permit a connection; pin access is more than center-coordinate equality.
Practical Example
A coordinate of 0.100 um lies on a zero-offset 0.001 um manufacturing grid. It is not on a zero-offset 0.048 um site grid, because 0.100/0.048 is not an integer. The finer-grid pass does not imply a placement-grid pass.
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