IntermediateQuestion 158 of 162Source: Synopsys ICC2 Implementation User Guide: Routing

What is inside a SPEF file, and what do you check in it?

From PDVerse PnR Interview Handbook · pdVerse Mentor Guide

By Tabish Iqbal · 9+ Years VLSI Physical Design Experience

Short Answer

SPEF (Standard Parasitic Exchange Format, IEEE 1481) holds the extracted resistance and capacitance of every net. It has a header with the design name and units, a ports section, and one D_NET block per net with its connections, capacitors and resistors, including coupling capacitors to other nets. Before trusting one, check its units, that it covers every net, and that it came from the netlist you are timing.

An annotated SPEF snippet with the header units, the port section, and one net's connection, capacitance and resistance sections labelled. — Technical Reference DiagramWhat is inside a SPEF file, and what do you check in it?

Technical Explanation

The header names the design, the extraction tool and version, and the units: T_UNIT for time, C_UNIT for capacitance, R_UNIT for resistance and L_UNIT for inductance.
A name map section usually follows, replacing long net and instance names with short indices to keep the file smaller.
The PORTS section lists the top-level ports and their directions.
Each net has a D_NET block starting with the net name and its total capacitance. Inside it, CONN lists the pins and ports it connects to.
CAP lists capacitors. A capacitor from one node to ground has one node; a coupling capacitor has two nodes, one on this net and one on another net. Signal integrity analysis relies on those coupling entries.
RES lists resistors between internal nodes, which together describe the distributed resistance of the wire.
In ICC2, write_parasitics writes SPEF, one file per corner if you extract several corners.

What To Check

Units in the header, and that the timing tool reads them as intended.
Net count in the SPEF against the netlist, and any nets with missing parasitics.
Nets with zero or tiny total capacitance, which usually mean a problem.
That the file matches the corner and netlist version you are timing.

Command Checks & Actions

ICC2write_parasitics -output block -format spef -corner cworst

Writes SPEF for one corner; the tool appends the parasitic technology name and temperature to the file name.

ICC2report_parasitics

Reports parasitic information in ICC2 so you can compare with what the file contains.

ICC2report_parasitics [get_nets n1]

Shows the R and C ICC2 holds for a net, to compare with that net's D_NET block in the file.

Healthy, Suspicious & Hard-stop Results

Healthy (illustrative): Every net annotated, units as expected, and total capacitance values in a sensible range.
Suspicious (illustrative): A few hundred nets with missing parasitics, often a name mapping problem after an ECO.
Hard stop: A SPEF from an older netlist, or units read wrongly so every capacitance is off by a factor of 1000.

Common Mistake

The Trap: Timing with a SPEF extracted before the last ECO. Most nets still match by name, so the tool reports only a small number of unannotated nets and runs. The changed nets fall back to estimated parasitics, and the timing on the paths the ECO touched is wrong.

What The Interviewer Is Testing

Whether you know the structure well enough to read one net's block.
Do you know where coupling capacitance appears?
A strong answer shows you check annotation coverage before trusting timing.

Follow-up Question & Model Response

"Why does coupling capacitance appear with two nodes in the CAP section?"

Candidate Model Response: A coupling capacitor sits between two different nets. Listing both nodes lets the timing tool know which net is the aggressor for that capacitor. Without that, it could only treat the capacitance as grounded and would not be able to calculate crosstalk delta delay or noise. Ground capacitance, by contrast, only needs the node on this net.

Practical Example

Tapeout Scenario: A SPEF header shows T_UNIT 1 PS, C_UNIT 1 FF and R_UNIT 1 OHM (illustrative). One net's block starts D_NET 1204 27.4, meaning 27.4 fF total. CONN lists a driver pin and two load pins. CAP has 9 ground capacitors and 3 coupling capacitors to nets 3381 and 5512. RES has 12 resistor segments. The file has a D_NET block for all 1.2 million nets in the netlist, so none will fall back to estimated parasitics when timing runs.

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