What is signal integrity, and why can a quiet wire still glitch?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Short Answer
Signal integrity, often shortened to SI, covers what happens when a wire's voltage is disturbed by something other than its own driver, most commonly capacitive coupling from a switching neighbor. A wire that is not supposed to change at all, a quiet or static net, can still see a temporary voltage bump purely because a neighbor switched and coupled some of its energy across. PrimeTime's SI analysis checks for this alongside ordinary delay calculation, because the coupling can either slow a signal down or create a glitch large enough to be misread as a real logic transition.
Technical Explanation
The disturbance comes entirely from a neighbor, not from the wire itself.
- Every two adjacent wires have some coupling capacitance between them, and a voltage change on one wire pushes charge onto its neighbor through that capacitance.
- If the neighbor, the aggressor, switches while the wire being checked, the victim, should stay fixed, the coupled charge creates a temporary bump called crosstalk noise.
- If both wires switch around the same time, the coupling instead speeds up or slows down the victim's own transition, which the tool reports as crosstalk delay rather than noise.
- Because both effects share the same coupling capacitance, PrimeTime SI calculates both together during extraction and delay calculation, using CCS current-source models where available.
- A large enough noise glitch on a quiet net can be misread by downstream logic as a real transition, which is a functional risk, not just a margin problem.
Common Mistake
The Trap: assuming a net that never changes state in test vectors has no signal integrity risk because "it never switches."
- The risk on a quiet net comes from its switching neighbors, not its own activity, so it can be static in every simulation and still need a crosstalk check.
- Skipping SI analysis on nets assumed "safe" because they are quiet is a common way a real crosstalk bug reaches silicon.
Follow-up Question & Model Response
Is crosstalk noise only a concern on long top-level wires, or does it matter inside small standard-cell-level nets too?
Candidate Model Response: Crosstalk risk scales with coupling capacitance relative to a net's own grounded capacitance, and long, closely spaced top-level wires tend to have the most coupling relative to total capacitance, which is why they dominate most SI violation lists. Short, standard-cell-level nets usually have less exposure, since they are shorter and often shielded by nearby power routing, but a densely packed block with tight spacing and a weak driver can still show meaningful crosstalk on short nets. The safest approach runs SI analysis across the whole design.
Practical Example
A 3mm bus wire routed with 0.1um spacing to a neighboring clock line picks up a 180mV noise glitch, out of a 900mV supply, when the neighbor switches while the bus wire is quiet. Since that glitch is large enough to be misread as a logic transition, the fix added a grounded shield wire between the two nets, cutting the coupling enough to bring the glitch to about 60mV.
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