What does minimum path resistance analysis reveal that IR drop doesn't?
From PDVerse PnR Interview Handbook · pdVerse Mentor Guide
Short Answer
IR drop is resistance times current, so a badly connected cell that happens to draw little current can pass an IR check. Minimum path resistance ignores current and reports the resistance of the least-resistive path from each pin to its taps, which exposes structural weaknesses such as a missing via or a single thin connection. It runs with analyze_rail -nets {VDD VSS} -min_path_resistance (ICC2) in Fusion, and with perform min_res_path (RH) or perform gridcheck (RH) in standalone RedHawk.
Technical Explanation
- The ICC2 guide defines a node's minimum path resistance as the resistance on the smallest resistive path to the ideal voltage sources: power or ground pins, user taps or packages. Because it is a single path, it is an upper bound on the node's effective resistance, not the same number.
- Current changes with mode, activity and later ECOs. A cell with a weak connection today can end up under busier logic after an ECO, or draw more current in a mode nobody analysed, and resistance flags that risk before the current exists.
- Run it before or during voltage drop:
analyze_rail -nets {VDD VSS} -min_path_resistance(ICC2) on its own, or with-voltage_drop static(ICC2) in the same run; both results go into one rail result. In RedHawk-SC Fusion-voltage_drop(ICC2) is required with it. report_rail_result -type minimum_path_resistance(ICC2) writes per-pin values; the instance_minimum_path_resistance type gives per-instance totals split into R to power and R to ground.report_rail_minimum_path -cell U19 -net VDD -error_cell(ICC2) saves one path to an error cell.- In standalone RedHawk,
perform gridcheck(RH) ranks instances by total P/G resistance normalized from 0 to 100, lists floating pins, and needs only extraction. A large imbalance between the VDD and VSS share at a high-resistance instance points to a weakness on one side. perform min_res_path -inst(RH) traces the least-resistance path from an instance's P/G pins to the pads, highlights it, and writes adsRpt/res_path.rpt with per-segment resistance and voltage drop plus a bottleneck summary. Run before simulation, the drop column is blank.- Typical findings are a missing via stack between straps, a rail connected at only one end, a narrow jog in a strap, or a macro pin reached through one long thin wire. On a quiet block these rarely show as large drops.
What To Check
- Tap validity before the run, since every path ends at a tap.
- Worst instances by total resistance, and outliers far above their row neighbours.
- The VDD and VSS split for the worst instances.
- Floating instances in the gridcheck report.
- The traced path of each outlier: layers, vias, and where the resistance accumulates.
Command Checks & Actions
analyze_rail -nets {VDD VSS} -min_path_resistance -voltage_drop staticComputes minimum path resistance together with static drop in one rail result.
report_rail_result -type instance_minimum_path_resistance -supply_nets {VDD VSS} inst_minres.rptWrites per-instance totals with R to power and R to ground.
report_rail_minimum_path -cell U19 -net VDD -error_cellSaves the geometries on U19's least-resistance VDD path to an error cell for the error browser.
perform gridcheck -o gridcheck.rpt -limit 500Ranks instances by normalized P/G resistance and lists floating pins.
perform min_res_path -inst u_core/U19Traces the least-resistance path from the instance to its pads into adsRpt/res_path.rpt.
Healthy, Suspicious & Hard-stop Results
- Healthy (illustrative): Instance resistance rises smoothly with distance from the taps, and the worst instances sit within 10% of each other.
- Suspicious (illustrative): A handful of instances at 3 to 5 times their row neighbours' resistance, or a strong VDD and VSS imbalance on them.
- Hard stop: Floating instances, or a traced path through a single via where the design intends a via stack.
Common Mistake
The Trap: Closing a grid review on the static IR map alone. A register bank connected through one via on a strap stub passes with 9 mV of drop because it is clock gated in the analysed scenario. In mission mode it switches every cycle, and the same weak connection becomes a dynamic hotspot that shows up in silicon as timing failures on that bank.
What The Interviewer Is Testing
- Explaining resistance against drop, and why dependence on current hides structural problems.
- Knowing minimum path resistance is an upper bound on effective resistance.
- Knowing both the Fusion and the standalone commands and when each runs.
Follow-up Question & Model Response
"How is effective resistance different?"
Candidate Model Response: Effective resistance accounts for all parallel paths between the node and the supply, so it is lower than or equal to the minimum path value. analyze_rail -effective_resistance (ICC2) computes it, and RedHawk-SC needs -voltage_drop (ICC2) with it too. I use minimum path resistance to find broken or thin structures quickly, and effective resistance to judge how much drop a pin will really see for a given current.
Practical Example
Tapeout Scenario: Static IR on a 0.8 V block is clean at 18 mV worst (illustrative). Minimum path resistance ranges from 12 ohm to 158 ohm, with 38 instances in one row at 140 to 158 ohm while their neighbours sit near 40 ohm. report_rail_minimum_path (ICC2) shows every one of those paths climbing through a single M2 to M3 via on a strap stub, because a routing blockage prevented the via array. Restoring the array brings them to 36 to 44 ohm. Their static drop barely changes, from 6 mV to 4 mV, but at a 0.2 mA switching current the 110 ohm saving is worth 110 ohm x 0.2 mA = 22 mV.
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