What are parasitics, and what is SPEF?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Short Answer
Parasitics are unintended electrical properties, resistance and capacitance, that physically exist in interconnect (metal wires and vias) simply because those wires are made of real conductive and dielectric materials, not because any designer deliberately added them. SPEF (Standard Parasitic Exchange Format) is the industry-standard text format used to represent those extracted values for every net in a design.
Example
The extraction flow runs from Physical layout (GDS) through a Technology file into an Extraction engine (StarRC), which solves the geometry into RC values, producing Parasitic data in SPEF (or DSPF) form, which then feeds a Delay calculator (FC/PT) to compute net delay and slew at each receiver.
Why It Matters
Interconnect resistance follows R = resistivity x length / cross-sectional area, meaning every wire's shape and material inherently create resistance and capacitance whether anyone wants it or not. SPEF is what carries those extracted, real values from the extraction tool over to the timing tool, so delay calculation reflects actual physical geometry instead of guesswork.
Equation
R = resistivity x length / cross-sectional areaCommand
read_parasitics .spefMentor Note — Common Mistake
Don't chase a strange or unexpected signoff delay number without first checking the SPEF file and the extraction settings that produced it, since bad or mismatched parasitic data is a common hidden cause of surprising timing numbers.
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