What's the difference between clock uncertainty and clock jitter?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Explanation
Clock jitter is the clock edge itself wobbling cycle to cycle at its source — an inherent property of the clock generator. Clock uncertainty is a margin the timing tool is told to subtract from the setup/hold budget to account for jitter plus other unknowns (like unmodeled skew), and it is set explicitly via set_clock_uncertainty rather than measured directly from the tree.
Timing-path Walkthrough
Pre-CTS, uncertainty is often set conservatively high to cover both jitter and an estimate of tree skew that isn't known yet — e.g., set_clock_uncertainty 120 in the worked example. Post-CTS, once the real tree exists and skew is now propagated and accounted for directly, uncertainty can be tightened to just jitter plus margin — e.g., set_clock_uncertainty 45.
Command
set_clock_uncertainty -setup / -holdSwitch-by-switch
-setup and -hold let uncertainty differ between the setup and hold checks; -from / -to
apply uncertainty specifically between a named pair of clocks (inter-clock) rather than
globally.Expected Report Behavior
The uncertainty value directly subtracts from data required time in report_timing; tightening it post-CTS (120 to 45 in the example) recovers slack that was conservatively reserved pre-CTS.
Mentor Note — Common Mistake
Leaving a large pre-CTS uncertainty value in place after CTS, needlessly burning margin that should have been freed up once real skew is propagated.
How To Debug
Compare the uncertainty value applied at different design stages against whether skew is now propagated; if propagated skew is active, verify uncertainty was reduced accordingly, as in the 120 to 45 worked transition.
Continue learning free
Get a practical low-power chapter
Receive the existing “Low Power and Multivoltage Fundamentals” PDF chapter and its download link by email.
Continue practising