ExpertQuestion 156 of 161Source: Ansys RedHawk User Manual: PathFinder ESD Analysis (Clamp DB Creation, ESD Rules Files, Layout Resistance Checking of Bumps and Clamps)

How does an ESD check verify discharge paths?

From PDVerse PnR Interview Handbook · pdVerse Mentor Guide

By Tabish Iqbal · 9+ Years VLSI Physical Design Experience

Short Answer

ESD signoff checks that the metal between each pad or bump and its clamp is low-resistance enough to carry a discharge without damaging the gates it protects. RedHawk's PathFinder builds a clamp database, then perform esdcheck (RH) measures bump-to-bump loop resistance, bump-to-clamp and clamp-to-clamp resistance and other rule types against limits in a rules file. DRC and LVS can confirm a clamp exists and is connected, but not that its path is strong enough.

A schematic of two bumps connected through supply metal to an ESD clamp, with arc resistances from each bump to the clamp, the loop resistance bump to clamp to bump, and a second parallel clamp path, each labelled with its resistance limit. — Technical Reference DiagramHow does an ESD check verify discharge paths?

Technical Explanation

An ESD strike pushes amperes through the pad, the supply metal and the clamp in nanoseconds. Resistance along that path turns into voltage across the protected devices, so the check is really about resistance.
PathFinder supports several resistance checks: bump-to-bump (B2B, including multi-stage), bump-to-clamp, bump-to-instance, clamp-to-clamp, clamp-to-instance and clamp-to-macro.
Clamps are defined in a clamp file. perform esdcheck -clamp <file> -setupClamp (RH) imports them into a binary clamp database so later checks do not reload the file.
The rules file sets each check's TYPE (RH), a rule NAME (RH), and limits: ARC_R (RH) for bump-to-clamp and clamp-to-clamp style checks, LOOP_R (RH) for a single bump-to-clamp-to-bump loop, and PARALLEL_R (RH) for the total effective resistance of a bump pair.
In a B2B check, loops over LOOP_R (RH) are marked invalid and dropped before the parallel resistance is computed, so a weak clamp does not count as protection. Without PARALLEL_R (RH) the pair passes if any single loop passes.
To see where resistance builds up, perform min_res_path -fromClamp (RH) traces minimum-resistance paths from clamp nodes once the clamp database exists.
Results go to adsRpt (RH) by default; report esdcheck (RH) formats them, and perform esdcheck -detail (RH) adds locations, nets, layers and clamp cell names to the B2B and multi-stage reports. ESD checking is turned off automatically in low-power analysis mode, so run it in its own session.

What To Check

Every bump pair and clamp pair required by the ESD plan has a rule.
Loop, arc and parallel resistance against the limits for each rule.
Clamps marked invalid because their loop failed.
That the check ran on the final GDS-derived data.

Command Checks & Actions

RedHawk (redhawk)perform esdcheck -clamp clamp.txt -setupClamp

Imports clamp definitions into the clamp database once, so later rule checks and clamp path tracing reuse it.

RedHawk (redhawk)perform esdcheck -rule esd_rules.txt -detail

Runs the resistance rules with detailed location reporting.

RedHawk (redhawk)perform min_res_path -instance u_core/u_rx0 -fromClamp

Traces minimum-resistance paths from the clamp nodes to an instance to see where resistance builds up.

RedHawk (redhawk)report esdcheck

Formats the ESD check results into reports.

Healthy, Suspicious & Hard-stop Results

Healthy (illustrative): All B2B pairs pass with parallel resistance at least 30% under the limit, and no clamps marked invalid.
Suspicious (illustrative): Pairs pass only through one clamp each, so one weak via stack would fail them.
Hard stop: Any failing loop or parallel resistance on an IO supply pair, or a clamp database built from an old clamp file.

Common Mistake

The Trap: Accepting a passing B2B check without looking at how many clamps carried it. Three of four clamps on a pair were invalid because of a thin strap, the pair passed on the fourth, and a later ECO that touched that clamp's via stack left the pad unprotected.

What The Interviewer Is Testing

Knowledge of the check types and the LOOP_R versus PARALLEL_R distinction.
Understanding why DRC and LVS are not enough for ESD.
Does the candidate know clamps must be defined before the checks, and that tracing paths from clamps needs the clamp database?

Follow-up Question & Model Response

"Why is loop resistance checked separately from the parallel result?"

Candidate Model Response: The parallel resistance can look fine when one strong clamp compensates for several weak ones. Checking each loop first and discarding clamps whose loop fails means the parallel number only counts clamps that can actually take the discharge. Otherwise a pair could pass with most of its clamps too far away through thin metal to conduct in time.

Practical Example

Tapeout Scenario: An IO ring has 48 bump pairs with a LOOP_R (RH) limit of 2 ohm and PARALLEL_R (RH) of 1 ohm (illustrative). The first run fails six pairs: their loops measure 2.3 to 2.8 ohm, so those clamps are discarded and the parallel result for the six pairs rises to 1.4 ohm. perform min_res_path (RH) shows most resistance in a single-cut via column on M2. Doubling the cuts brings the loops to 1.6 ohm and every pair passes with parallel resistance under 0.7 ohm.

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