What is the difference between an early derate and a late derate?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Short Answer
A late derate scales a delay up, making a path look slower than the "typical" number calculated it to be, and PrimeTime applies it wherever running late is the dangerous direction. An early derate scales a delay down, making a path look faster, and the tool applies it wherever running early is the dangerous direction. Which paths get which derate flips depending on whether the tool is checking setup or hold.
Technical Explanation
The two derate directions model two different kinds of risk on the same clock tree.
set_timing_derate -late 1.05(SDC) multiplies delay by 1.05, adding margin for a slower-than-typical instance.set_timing_derate -early 0.95(SDC) multiplies delay by 0.95, adding margin for a faster-than-typical instance.- For a setup check, late derate applies to the launch clock and data path, since arriving too late is the risk, and early derate applies to the capture clock path, since an edge arriving too early shrinks the window.
- For a hold check, the roles flip: early derate goes on the launch clock path and data path, late derate goes on the capture clock path, since data arriving too early relative to a late capture edge is now dangerous.
- Because both directions derate in the same run, one on-chip variation analysis checks setup and hold together, each side with the correct derate.
Common Mistake
The Trap: assuming "late" derate means "the late-arriving path" and "early" derate means "the early-arriving path," instead of which direction of variation is dangerous for that check.
- Applying late derate uniformly to "the clock" without separating launch from capture ignores that the same clock signal plays two roles in the same check.
- This mix-up produces a report that looks derated but has quietly derated the wrong side of the path, hiding a real violation instead of catching one.
Follow-up Question & Model Response
Does the same clock path ever get both an early derate and a late derate applied inside a single report_timing run?
Candidate Model Response: Yes, and that is expected. The same physical clock tree serves as the launch path for one check and the capture path for another at the same edge, so within one run the tool derates that tree late when acting as a launch path and early when acting as a capture path. A report_timing -derate (PT) listing shows a different factor per point depending on whether it sits on the arrival side or the required side. This is also part of why clock reconvergence pessimism removal exists.
Practical Example
For a setup check on a 500MHz clock, the launch and data path get a late derate of 1.08, while the capture clock edge gets an early derate of 0.92. If the base data arrival time is 1.60ns and the ideal capture edge is 2.00ns, the derated comparison is roughly 1.73ns arrival against 1.84ns required, a slack of about 110ps instead of the 400ps an un-derated comparison would report.
Complete STA Handbook
Master Signoff-Ready Static Timing Analysis
Get the complete 10-chapter STA handbook covering setup/hold margins, clock modeling, OCV/POCV, crosstalk noise, and PrimeTime closure.
Continue practising