Why does PrimeTime apply different derate values to cell delay and net delay?
From PDVerse STA Mentor Guide · pdVerse Mentor Guide
Short Answer
Cell delay comes from a transistor's switching speed, which depends on process parameters like threshold voltage that vary meaningfully from one physical location on the die to another. Net delay comes mostly from wire resistance and capacitance, set by the metal stack's geometry, which varies far less across a die than transistor speed does. Because the two delay types come from different physical sources with different amounts of variation, PrimeTime lets you set separate derate factors for each with -cell_delay and -net_delay (SDC) instead of forcing one number to cover both.
Technical Explanation
Cell delay and net delay vary for different physical reasons, so one derate number rarely fits both well.
- Cell delay depends on transistor drive strength, which shifts with local dopant variation and threshold-voltage mismatch; two instances of the same cell a short distance apart can differ measurably.
- Net delay depends on wire resistance and capacitance from the interconnect stack, and modern processes control metal thickness and spacing tightly enough that wire RC varies much less than transistor speed.
set_timing_derate -cell_delay -late 1.10(SDC) derates only the gate-switching component of every arc, leaving wire delay untouched.set_timing_derate -net_delay -late 1.03(SDC) derates only the wire component, using a smaller factor because interconnect is more predictable.- One combined derate sized to cover the worse cell-delay variation over-derates every net and wastes slack a split derate would have kept.
Common Mistake
The Trap: reusing the same conservative derate factor for net delay that was chosen to be safe for cell delay.
- This treats a stable, well-controlled quantity, wire RC, as if it varied as much as an unstable one, transistor speed, adding margin the design does not need.
- On wire-dominated long interconnect paths, this can turn a passing path into an apparent violation no physical fix would remove, since the "violation" is really excess derate.
Follow-up Question & Model Response
Does the net delay derate also apply to the crosstalk-induced part of net delay, or only the base wire delay?
Candidate Model Response: set_timing_derate -net_delay (SDC) derates both parts by default: the static wire delay and the dynamic delay change caused by crosstalk, but -static and -dynamic let you split them if a team wants a different margin for each. Crosstalk-induced delay already carries its own uncertainty from which neighbors switch at the same time, so some flows leave the dynamic component un-derated and rely on crosstalk analysis itself to bound it. Whichever choice is made, it should stay consistent across the whole signoff flow.
Practical Example
A 2mm top-level bus wire reports 220ps of base net delay. With a cell-delay-focused flat derate of 1.10 misapplied to net delay too, that wire would report 242ps. Splitting the derate so net delay only gets 1.03 keeps the reported delay at about 227ps, recovering 15ps of slack across dozens of similar long wires on the same bus.
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